UPD78F9200MA-CAC-A Renesas Electronics America, UPD78F9200MA-CAC-A Datasheet - Page 242

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UPD78F9200MA-CAC-A

Manufacturer Part Number
UPD78F9200MA-CAC-A
Description
MCU 8BIT 1KB FLASH 128B RAM
Manufacturer
Renesas Electronics America
Series
78K0S/Kx1+r
Datasheet

Specifications of UPD78F9200MA-CAC-A

Package / Case
*
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Speed
10MHz
Number Of I /o
7
Core Processor
78K0S
Program Memory Type
FLASH
Ram Size
128 x 8
Program Memory Size
1KB (1K x 8)
Data Converters
A/D 4x10b
Oscillator Type
Internal
Peripherals
LVD, POR, PWM, WDT
Core Size
8-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F9200MA-CAC-A
Manufacturer:
NEC
Quantity:
20 000
240
1. Operating conditions of FPRERR flag
2. Operating conditions of VCERR flag
3. Operating conditions of WEPRERR flag
<Setting conditions>
<Reset conditions>
<Setting conditions>
<Reset conditions>
<Setting conditions>
<Reset conditions>
• If PFCMD is written when the store instruction operation recently performed on a peripheral register is not to
• If the first store instruction operation after <1> is on a peripheral register other than FLPMC
• If the first store instruction operation after <2> is on a peripheral register other than FLPMC
• If a value other than the inverted value of the value to be set to FLPMC is written by the first store instruction
• If the first store instruction operation after <3> is on a peripheral register other than FLPMC
• If a value other than the value to be set to FLPMC (value written in <2>) is written by the first store instruction
• If 0 is written to the FPRERR flag
• If the reset signal is generation
• Erasure verification error
• Internal writing verification error
• When 0 is written to the VCERR flag
• When the reset signal generation
• If the area specified by the protect byte to be protected from erasing or writing is specified by the flash
• If 1 is written to a bit that has not been erased (a bit for which the data is 0).
• When 0 is written to the WEPRERR flag
• When the reset signal generation
write a specific value (A5H) to FLPMC
after <2>
after <3>
Remark The numbers in angle brackets above correspond to the those in (2) Flash protect command
If VCERR is set, it means that the flash memory has not been erased or written correctly. Erase or write the
memory again in the specified procedure.
Remark The VCERR flag may also be set if an erase or write protect error occurs.
address pointer H (FLAPH) and a command is executed to this area
Address: FFA1H
Symbol
PFS
register (PFCMD).
7
0
Figure 16-12. Format of Flash Status Register (PFS)
After reset: 00H
6
0
CHAPTER 16 FLASH MEMORY
User’s Manual U18172EJ3V0UD
5
0
R/W
4
0
3
0
WEPRERR
2
VCERR
1
FPRERR
0

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