UPD78F9200MA-CAC-A Renesas Electronics America, UPD78F9200MA-CAC-A Datasheet - Page 167

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UPD78F9200MA-CAC-A

Manufacturer Part Number
UPD78F9200MA-CAC-A
Description
MCU 8BIT 1KB FLASH 128B RAM
Manufacturer
Renesas Electronics America
Series
78K0S/Kx1+r
Datasheet

Specifications of UPD78F9200MA-CAC-A

Package / Case
*
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Speed
10MHz
Number Of I /o
7
Core Processor
78K0S
Program Memory Type
FLASH
Ram Size
128 x 8
Program Memory Size
1KB (1K x 8)
Data Converters
A/D 4x10b
Oscillator Type
Internal
Peripherals
LVD, POR, PWM, WDT
Core Size
8-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F9200MA-CAC-A
Manufacturer:
NEC
Quantity:
20 000
(4) 8-bit A/D conversion result register (ADCRH)
(5) Port mode register 2 (PM2) and port mode control register 2 (PMC2)
Address: FF22H
Symbol
Address: FF84H
Symbol
PMC2
PM2
This register is an 8-bit register that stores the A/D conversion result. It stores the higher 8 bits of a 10-bit
resolution result.
ADCRH can be read by an 8-bit memory manipulation instruction.
Reset signal generation makes ADCRH undefined.
When using the when the P20/ANI0/TI000/TOH1, P21/ANI1/TI010/TO00/INTP0, P22/ANI2, and P23/ANI3 pins
for analog input, set PM20 to PM23 and PMC20 to PMC23 to 1. At this time, the output latches of P20 to P23
may be 0 or 1.
PM2 and PMC2 are set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets PM2 to 00H and clears PMC2 to FFH.
Caution If PMC20 to PMC23 are set to 1, the P20/ANI0/TI000/TOH1, P21/ANI1/TIO10/TO00/INTP0,
PMC2n
PM2n
7
1
0
1
7
0
0
1
Address: FF1AH
ADCRH
Symbol
After reset: FFH
After reset: 00H
P22/ANI2, and P23/ANI3 pins cannot be used for any purpose other than the A/D converter
function.
Be sure to set 0 to the Pull-up resistor option register of the pin set in A/D converter mode.
Figure 9-7. Format of 8-Bit A/D Conversion Result Register (ADCRH)
Output mode (output buffer on)
Input mode (output buffer off)
Port/Alternate-function (except A/D converter) mode
A/D converter mode
Figure 9-9. Format of Port Mode Control Register 2 (PMC2)
6
1
6
0
7
Figure 9-8. Format of Port Mode Register 2 (PM2)
After reset: Undefined
CHAPTER 9 A/D CONVERTER ( PD78F920x ONLY)
R/W
R/W
6
5
1
5
0
User’s Manual U18172EJ3V0UD
5
Operation mode specification (n = 0 to 3)
Pmn pin I/O mode selection (n = 0 to 3)
4
1
4
0
R
4
PMC23
PM23
3
3
3
2
PMC22
PM22
2
2
1
PMC21
PM21
1
1
0
PMC20
PM20
0
0
165

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