SAK-XC866-1FRA AB Infineon Technologies, SAK-XC866-1FRA AB Datasheet - Page 18
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SAK-XC866-1FRA AB
Manufacturer Part Number
SAK-XC866-1FRA AB
Description
IC MCU 8BIT FLASH 38-TSSOP
Manufacturer
Infineon Technologies
Series
XC8xxr
Datasheet
1.SAF-XC866-2FRI_BC.pdf
(116 pages)
Specifications of SAK-XC866-1FRA AB
Core Processor
XC800
Core Size
8-Bit
Speed
86MHz
Connectivity
SSI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
19
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
38-TSSOP
Data Bus Width
8 bit
Data Ram Size
750 B
Interface Type
UART, SSC
Maximum Clock Frequency
26.67 MHz
Number Of Programmable I/os
27
Number Of Timers
3
Operating Supply Voltage
3.3 V, 5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
SP000235420
3
3.1
The XC866 is based on a high-performance 8-bit Central Processing Unit (CPU) that is
compatible with the standard 8051 processor. While the standard 8051 processor is
designed around a 12-clock machine cycle, the XC866 CPU uses a 2-clock machine
cycle. This allows fast access to ROM or RAM memories without wait state. Access to
the Flash memory, however, requires an additional wait state (one machine cycle). The
instruction set consists of 45% one-byte, 41% two-byte and 14% three-byte instructions.
The XC866 CPU provides a range of debugging features, including basic stop/start,
single-step execution, breakpoint support and read/write access to the data memory,
program memory and SFRs.
Figure 5
Figure 5
Data Sheet
Legacy External Interrupts (IEN0, IEN1)
shows the CPU functional blocks.
Functional Description
Processor Architecture
Non-Maskable Interrupt
CPU Block Diagram
Program Memory
External Interrupts
External Data
Memory Wait
Memory
Reset
f
CCLK
16-bit Registers &
Memory Interface
Opcode Decoder
State Machine &
Power Saving
Core SFRs
Immediate
Opcode &
Controller
Registers
Interrupt
14
Register Interface
Multiplier / Divider
Timer 0 / Timer 1
UART
ALU
Functional Description
External SFRs
Internal Data
V1.2, 2007-10
Memory
XC866