SAK-XC866-1FRA AB Infineon Technologies, SAK-XC866-1FRA AB Datasheet - Page 29

• Manufacturer Part Number: SAK-XC866-1FRA AB
• Description: IC MCU 8BIT FLASH 38-TSSOP
• Manufacturer: Infineon Technologies
• Series: XC8xxr

Specifications of SAK-XC866-1FRA AB

• Core Processor: XC800
• Core Size: 8-Bit
• Speed: 86MHz
• Connectivity: SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 38-TSSOP
• Data Bus Width: 8 bit
• Data Ram Size: 750 B
• Interface Type: UART, SSC
• Maximum Clock Frequency: 26.67 MHz
• Number Of Programmable I/os: 27
• Number Of Timers: 3
• Operating Supply Voltage: 3.3 V, 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: SP000235420

3.2.3
The bit protection scheme prevents direct software writing of selected bits (i.e., protected
bits) using the PASSWD register. When the bit field MODE is 11
bit field PASS opens access to writing of all protected bits, and writing 10101
field PASS closes access to writing of all protected bits. In both cases, the value of the
bit field MODE is not changed even if PASSWD register is written with 98
only be changed when bit field PASS is written with 11000
PASSWD register disables the bit protection scheme.
The access is opened for maximum 32 CCLKs if the “close access” password is not
written. If “open access” password is written again before the end of 32 CCLK cycles,
there will be a recount of 32 CCLK cycles. The protected bits include NDIV, WDTEN, PD,
and SD.
PASSWD
Password Register
Field
MODE
PROTECT_S
PASS
Data Sheet
7
Bit Protection Scheme
6
Bits
[1:0]
2
[7:3]
PASS
w
5
Type Description
rw
rh
w
Bit Protection Scheme Control bits
00
11
Others: Scheme Enabled
These two bits cannot be written directly. To change
the value between 11
must be written with 11000
MODE[1:0] be registered.
Bit Protection Signal Status bit
This bit shows the status of the protection.
0
1
Password bits
The Bit Protection Scheme only recognizes three
patterns.
11000
10011
10101
4
Scheme Disabled
Scheme Enabled (default)
Software is able to write to all protected bits.
Software is unable to write to any protected
bits.
B
B
B
25
Enables writing of the bit field MODE.
Opens access to writing of all protected bits.
Closes access to writing of all protected bits.
3
PROTECT
B
and 00
B
_S
, for example, writing D0
rh
2
B
; only then, will the
Functional Description
B
B
, writing 10011
, the bit field PASS
Reset Value: 07
1
H
MODE
or A8
V1.2, 2007-10
rw
B
to the bit
H
XC866
B
. It can
0
to the
H
to
H