SAK-XC866-1FRA AB Infineon Technologies, SAK-XC866-1FRA AB Datasheet - Page 25

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SAK-XC866-1FRA AB

Manufacturer Part Number
SAK-XC866-1FRA AB
Description
IC MCU 8BIT FLASH 38-TSSOP
Manufacturer
Infineon Technologies
Series
XC8xxr
Datasheet

Specifications of SAK-XC866-1FRA AB

Core Processor
XC800
Core Size
8-Bit
Speed
86MHz
Connectivity
SSI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
19
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
38-TSSOP
Data Bus Width
8 bit
Data Ram Size
750 B
Interface Type
UART, SSC
Maximum Clock Frequency
26.67 MHz
Number Of Programmable I/os
27
Number Of Timers
3
Operating Supply Voltage
3.3 V, 5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
SP000235420
3.2.2.2
Address extension is further performed at the module level by paging. With the address
extension by mapping, the XC866 has a 256-SFR address range. However, this is still
less than the total number of SFRs needed by the on-chip peripherals. To meet this
requirement, some peripherals have a built-in local address extension mechanism for
increasing the number of addressable SFRs. The extended address range is not directly
controlled by the CPU instruction itself, but is derived from bit field PAGE in the module
page register MOD_PAGE. Hence, the bit field PAGE must be programmed before
accessing the SFR of the target module. Each module may contain a different number
of pages and a different number of SFRs per page, depending on the specific
requirement. Besides setting the correct RMAP bit value to select the SFR area, the user
must also ensure that a valid PAGE is selected to target the desired SFR. A page inside
the extended address range can be selected as shown in
Figure 9
Data Sheet
Address Extension by Paging
Address Extension by Paging
(to/from CPU)
SFR Address
(from CPU)
SFR Data
rw
MOD_PAGE.PAGE
21
Module
Figure
SFR0
SFR1
SFR0
SFR1
SFR0
SFR1
SFRx
SFRy
SFRz
PAGE 0
PAGE 1
PAGE q
Functional Description
9.
V1.2, 2007-10
XC866

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