SAK-XC866-1FRA AB Infineon Technologies, SAK-XC866-1FRA AB Datasheet - Page 42

• Manufacturer Part Number: SAK-XC866-1FRA AB
• Description: IC MCU 8BIT FLASH 38-TSSOP
• Manufacturer: Infineon Technologies
• Series: XC8xxr

Specifications of SAK-XC866-1FRA AB

• Core Processor: XC800
• Core Size: 8-Bit
• Speed: 86MHz
• Connectivity: SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 38-TSSOP
• Data Bus Width: 8 bit
• Data Ram Size: 750 B
• Interface Type: UART, SSC
• Maximum Clock Frequency: 26.67 MHz
• Number Of Programmable I/os: 27
• Number Of Timers: 3
• Operating Supply Voltage: 3.3 V, 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: SP000235420

3.3
The Flash memory provides an embedded user-programmable non-volatile memory,
allowing fast and reliable storage of user code and data. It is operated from a single 2.5 V
supply from the Embedded Voltage Regulator (EVR) and does not require additional
programming or erasing voltage. The sectorization of the Flash memory allows each
sector to be erased independently.
Features
• In-System Programming (ISP) via UART
• In-Application Programming (IAP)
• Error Correction Code (ECC) for dynamic correction of single-bit errors
• Background program and erase operations for CPU load minimization
• Support for aborting erase operation
• Minimum program width
• 1-sector minimum erase width
• 1-byte read access
• Flash is delivered in erased state (read all zeros)
• Operating supply voltage: 2.5 V ± 7.5 %
• Read access time: 3 ×
• Program time: 209440 /
• Erase time: 8175360 /
1)
2)
3)
Data Sheet
P-Flash: 32-byte wordline can only be programmed once, i.e., one gate disturb allowed.
D-Flash: 32-byte wordline can be programmed twice, i.e., two gate disturbs allowed.
f
f
obtaining the worst case timing.
sys
sys
= 80 MHz ± 7.5% (
= 80 MHz ± 7.5% is the only frequency range for Flash programming and erasing.
Flash Memory
f
CCLK
f
= 26.7 MHz ± 7.5 %) is the maximum frequency range for Flash read access.
t
SYS
CCLK
1)
f
SYS
of 32-byte for D-Flash and 32-byte for P-Flash
= 102 ms
= 112.5 ns
= 2.6 ms
3)
3)
2)
38
Functional Description
f
sysmin
V1.2, 2007-10
is used for
XC866