SAK-XC866-1FRA AB Infineon Technologies, SAK-XC866-1FRA AB Datasheet - Page 86

• Manufacturer Part Number: SAK-XC866-1FRA AB
• Description: IC MCU 8BIT FLASH 38-TSSOP
• Manufacturer: Infineon Technologies
• Series: XC8xxr

Specifications of SAK-XC866-1FRA AB

• Core Processor: XC800
• Core Size: 8-Bit
• Speed: 86MHz
• Connectivity: SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 38-TSSOP
• Data Bus Width: 8 bit
• Data Ram Size: 750 B
• Interface Type: UART, SSC
• Maximum Clock Frequency: 26.67 MHz
• Number Of Programmable I/os: 27
• Number Of Timers: 3
• Operating Supply Voltage: 3.3 V, 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: SP000235420

For module clock f
shown in
Table 30
Module Clock f
26.7 MHz
As f
26.7 MHz. During slow-down mode where f
etc., CTC can be set to 00
10 MHz. However, it is important to note that the conversion error could increase due to
loss of charges on the capacitors, if f
3.18.2
The analog-to-digital conversion procedure consists of the following phases:
• Synchronization phase (t
• Sample phase (t
• Conversion phase
• Write result phase (t
Figure 34
Data Sheet
SAMPLE Bit
BUSY Bit
ADCI
f
ADCI
cannot exceed 10 MHz, bit field CTC should not be set to 00
Table
ADC Conversion Sequence
conversion start
trigger
f
ADC Conversion Timing
ADCI
30.
ADC
t
SYN
ADC
S
Frequency Selection
)
Sample Phase
= 26.7 MHz, the analog clock f
WR
CTC
00
01
10
11
)
B
B
B
B
t
B
S
SYN
(default)
as long as the divided analog clock f
)
t
CONV
ADC
Conversion Phase
becomes too low during slow-down mode.
82
ADC
Prescaling Ratio
÷ 2
÷ 3
÷ 4
÷ 32
may be reduced to 13.3 MHz, 6.7 MHz
ADCI
interrupt
Source
frequency can be selected as
Write Result Phase
Functional Description
Analog Clock f
13.3 MHz (N.A)
8.9 MHz
6.7 MHz
833.3 kHz
ADCI
t
WR
Channel
interrupt
does not exceed
B
when f
V1.2, 2007-10
interrupt
Result
XC866
ADCI
ADC
is