UPD78F0552MA-FAA-AX Renesas Electronics America, UPD78F0552MA-FAA-AX Datasheet - Page 169

• Manufacturer Part Number: UPD78F0552MA-FAA-AX
• Description: MCU 8BIT 16-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2-Lr

Specifications of UPD78F0552MA-FAA-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 9
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

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78K0/Kx2-L
4.2.6 Port 6
mode register 6 (PM6). When the P60 to P63 pins are used as an input port, use of an on-chip pull-up resistor can be
specified in 1-bit units by pull-up resistor option register 6 (PU6).
using port input mode register 6 (PIM6).
1-bit units, using port output mode register 6 (POM6).
R01UH0028EJ0400 Rev.4.00
Sep 27, 2010
P60/SCLA0/TxD6
P61/SDAA0/RxD6
Port 6 is an I/O port with an output latch. Port 6 can be set to the input mode or output mode in 1-bit units using port
Input to the P60 and P61 pins can be specified through a normal input buffer or an SMBus input buffer in 1-bit units,
Output from the P60 to P63 pins can be specified as normal CMOS output or N-ch open-drain output (V
This port can also be used for serial interface data I/O, clock I/O, and external clock input.
Reset signal generation sets port 6 to input mode.
Cautions 1. To use P60/SCLA0/SCK11/INTP11 and P62/SO11/INTP9 of 78K0/KC2-L as general-purpose ports,
Figures 4-22 to 4-25 show block diagrams of port 6.
(
μ
78K0/KY2-L
PD78F055x)
16 Pins
−
−
2. To use P60/SCLA0/TxD6 of 78K0/KY2-L and 78K0/KA2-L as general-purpose port, clear bit 0
set serial operation mode register 11 (CSIM11) and serial clock selection register 11 (CSIC11) to
the default status (00H).
(TXDLV6) of asynchronous serial interface control register 6 (ASICL6) to 0 (normal output of
TxD6).
P60/SCLA0/TxD6
P61/SDAA0/RxD6
20, 25, 32 Pins
(
μ
78K0/KA2-L
PD78F056x)
−
−
P60/SCLA0/INTP11
P61/SDAA0/INTP10
(
μ
78K0/KB2-L
PD78F057x)
30 Pins
−
−
P60/SCLA0/SCK11/
INTP11
P61/SDAA0/SI11/
INTP10
P62/SO11/INTP9
40 Pins
−
CHAPTER 4 PORT FUNCTIONS
(
μ
78K0/KC2-L
PD78F058x)
P60/SCLA0/SCK11/
INTP11
P61/SDAA0/SI11/
INTP10
P62/SO11/INTP9
P63/INTP8
44, 48 Pins
DD
tolerance) in
155