UPD78F0552MA-FAA-AX Renesas Electronics America, UPD78F0552MA-FAA-AX Datasheet - Page 810

• Manufacturer Part Number: UPD78F0552MA-FAA-AX
• Description: MCU 8BIT 16-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2-Lr

Specifications of UPD78F0552MA-FAA-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 9
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2-L
R01UH0028EJ0400 Rev.4.00
Sep 27, 2010
CHAPTER 12 A/D CONVERTER
p.421
p.433
CHAPTER 13 OPERATIONAL AMPLIFIERS
p.435
p.439
p.444
CHAPTER 16 SERIAL INTERFACES CSI10 AND CSI11
p.573
p.574
p.574
CHAPTER 17 INTERRUPT FUNCTIONS
pp.592, 593
CHAPTER 19 STANDBY FUNCTION
p.649
CHAPTER 20 RESET FUNCTION
pp.662, 663
p.664
CHAPTER 21 POWER-ON-CLEAR CIRCUIT
p.668
CHAPTER 22 LOW-VOLTAGE DETECTOR
p.673
p.675
p.676
p.680
p.680
p.685
p.685
CHAPTER 23 REGULATOR
p.691
CHAPTER 24 OPTION BYTE
p.694
p.696
p.697
p.698
Remark “Classification” in the above table classifies revisions as follows.
Page
(a): Error correction, (b): Addition/change of specifications, (c): Addition/change of description or note, (d):
Addition/change of package, part number, or management division, (e): Addition/change of related
documents
Change of Table 12-8. Setting Functions of P70/ANI8 to P72/ANI10 Pins
Change of mode name in Table 12-9. Resistance and Capacitance Values of Equivalent Circuit
(Reference Values)
Change of Figure 13-1. Block Diagram of Operational Amplifier
Change of Figure 13-6. Format of Analog Input Channel Specification Register (ADS)
Change of Table 13-5. Setting Functions of P21/ANI1/AMP0OUT/PGAIN Pin
Change of (4) Port mode registers 0, 1, 3, 4, 6, 12 (PM0, PM1, PM3, PM4, PM6, PM12)
in 16.3 Registers Controlling Serial Interfaces CSI10 and CSI11
Addition of Figure 16-9. Format of Port Mode Register 0 (PM0)
Addition of Figure 16-11. Format of Port Mode Register 3 (PM3)
Change of Table 17-1. Interrupt Source List
Addition of Caution in Table 19-3. Operating Statuses in STOP Mode
Change of Note in Table 20-2. Hardware Statuses After Reset Acknowledgment
Change of Table 20-3. RESF Status When Reset Request Is Generated
Change of Figure 21-2. Timing of Generation of Internal Reset Signal by Power-on-Clear Circuit
and Low-Voltage Detector (2/2)
Change of Note 1 in Figure 22-2. Format of Low-Voltage Detection Register (LVIM)
Change of Note in Figure 22-3. Format of Low-Voltage Detection Level Select Register (LVIS)
Change of Remark 1 in 22.4 (1) Used as reset (LVIMD = 1)
Change of description in 22.4.1 (1) (b) When LVI default start function enabled is set (LVISTART =
1)
Change of Figure 22-6. Timing of Low-Voltage Detector Internal Reset Signal Generation (Bit:
LVISEL = 0, Option Byte: LVISTART = 1)
Change of description in 22.4.2 (1) (b) When LVI default start function enabled is set (LVISTART =
1)
Change of Figure 22-9. Timing of Low-Voltage Detector Interrupt Signal Generation (Bit: LVISEL
= 0, Option Byte: LVISTART = 1)
Change of (1) Regulator mode control register (RMC) in 23.2 Register Controlling Regulator
Change of (4) 0083H/1083H in 24.1 Functions of Option Bytes
Change of description of LVISTART bit in Figure 24-1. Format of Option Byte (2/3)
Change of Figure 24-1. Format of Option Byte (3/3)
Change of description example of software in 24.2 Format of Option Byte
Description
APPENDIX C REVISION HISTORY
Classification
(d)
(d)
(d)
(d)
(d)
(b)
(b)
(b)
(b)
(b)
(b)
(b)
(b)
(b)
(b)
(b)
(b)
(b)
(b)
(b)
(c)
(c)
(c)
(c)
(c)
(3/4)
796