UPD78F0552MA-FAA-AX Renesas Electronics America, UPD78F0552MA-FAA-AX Datasheet - Page 412

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UPD78F0552MA-FAA-AX

Manufacturer Part Number
UPD78F0552MA-FAA-AX
Description
MCU 8BIT 16-SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2-Lr
Datasheet

Specifications of UPD78F0552MA-FAA-AX

Core Processor
78K/0
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
9
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
78K0/Kx2-L
Remark √: Mounted, −: Not mounted
11.1 Functions of Clock Output Controller
supply to peripheral ICs. The clock selected with the clock output selection register (CKS) is output.
11.2 Configuration of Clock Output Controller
R01UH0028EJ0400 Rev.4.00
Sep 27, 2010
Clock output
controller
The clock output controller is intended for carrier output during remote controlled transmission and clock output for
Figure 11-1 shows the block diagram of clock output controller.
The clock output controller includes the following hardware.
Item
f
f
PRS
SUB
Control registers
(
μ
78K0/KY2-L
PD78F055x)
Prescaler
16 Pins
CLOE
Item
8
Figure 11-1. Block Diagram of Clock Output Controller
CHAPTER 11 CLOCK OUTPUT CONTROLLER
Table 11-1. Configuration of Clock Output Controller
f
PRS
CCS3
to f
Internal bus
PRS
20, 25, 32 Pins
(
μ
78K0/KA2-L
CCS2
/2
PD78F056x)
(48-pin products of 78K0/KC2-L)
7
Clock output selection register (CKS)
Port mode register 4 (PM4)
Port register 4 (P4)
Clock output select register (CKS)
CCS1
CCS0
controller
Clock
CHAPTER 11 CLOCK OUTPUT CONTROLLER
(
μ
78K0/KB2-L
Configuration
PD78F057x)
30 Pins
Output latch
(P42)
PM42
40, 44 Pins
PCL/SSI11/INTP6/P42
(
μ
78K0/KC2-L
PD78F058x)
48 Pins
398

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