UPD78F0552MA-FAA-AX Renesas Electronics America, UPD78F0552MA-FAA-AX Datasheet - Page 540

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UPD78F0552MA-FAA-AX

Manufacturer Part Number
UPD78F0552MA-FAA-AX
Description
MCU 8BIT 16-SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2-Lr
Datasheet

Specifications of UPD78F0552MA-FAA-AX

Core Processor
78K/0
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
9
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
78K0/Kx2-L
15.5.16 Communication operations
R01UH0028EJ0400 Rev.4.00
Sep 27, 2010
The following shows three operation procedures with the flowchart.
(1) Master operation in single master system
(2) Master operation in multimaster system
(3) Slave operation
The flowchart when using the 78K0/Kx2-L microcontrollers as the master in a single master system is shown below.
This flowchart is broadly divided into the initial settings and communication processing. Execute the initial settings
at startup.
communication processing.
In the I
specifications when the bus takes part in a communication. Here, when data and clock are at a high level for a
certain period (1 frame), the 78K0/Kx2-L microcontrollers take part in a communication with bus released state.
This flowchart is broadly divided into the initial settings, communication waiting, and communication processing.
The processing when the 78K0/Kx2-L microcontrollers lose in arbitration and is specified as the slave is omitted
here, and only the processing as the master is shown. Execute the initial settings at startup to take part in a
communication. Then, wait for the communication request as the master or wait for the specification as the slave.
The
transmission/reception with the slave and the arbitration with other masters.
An example of when the 78K0/Kx2-L microcontrollers are used as the I
When used as the slave, operation is started by an interrupt. Execute the initial settings at startup, then wait for the
INTIICA0 interrupt occurrence (communication waiting). When an INTIICA0 interrupt occurs, the communication
status is judged and its result is passed as a flag over to the main processing.
By checking the flags, necessary communication processing is performed.
actual
2
C bus multimaster system, whether the bus is released or used cannot be judged by the I
If communication with the slave is required, prepare the communication and then execute
communication
is
performed
in
the
communication
CHAPTER 15 SERIAL INTERFACE IICA
2
C bus slave is shown below.
processing,
and
it
supports
2
C bus
526
the

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