UPD78F0552MA-FAA-AX Renesas Electronics America, UPD78F0552MA-FAA-AX Datasheet - Page 454

• Manufacturer Part Number: UPD78F0552MA-FAA-AX
• Description: MCU 8BIT 16-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2-Lr

Specifications of UPD78F0552MA-FAA-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 9
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2-L
(4) Port mode registers 1, 2 (PM1, PM2)
R01UH0028EJ0400 Rev.4.00
Sep 27, 2010
Caution
When using AMP0-/ANI0/P20, AMP0OUT/PGAIN/ANI1/P21, and AMP0+/ANI2/P22 pins for the operational amplifier
0, set PM20 to PM22 to 1.
When using AMP1-/ANI8/P10, AMP1OUT/ANI9/P11, and AMP1+/ANI10/P12 pins for the operational amplifier 1, set
PM10 to PM12 to 1.
The output latches of P20 to P22 and P10 to P12 at this time may be 0 or 1.
If PM20 to PM22 and PM10 to PM12 are set to 0, they cannot be used as the operational amplifier 0 and 1 pins.
PM1 and PM2 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets these registers to FFH.
Symbol
Address: FF21H
3. Set ADS after PGA operation setting when selecting the PGA output signal as analog input. Set
Remark The figure shown above presents the format of port mode register 1 of the 78K0/KB2-L and
PM1
ADS after single AMP operation setting when selecting the operational amplifier output signal as
analog input.
PM17
PM1n
78K0/KC2-L.
7
0
1
After reset: FFH
Output mode (output buffer on)
Input mode (output buffer off)
Figure 13-7. Format of Port Mode Register 1 (PM1)
PM16
6
PM15
5
R/W
P1n pin I/O mode selection (n = 0 to 7)
PM14
4
PM13
CHAPTER 13 OPERATIONAL AMPLIFIERS
3
PM12
2
PM11
1
PM10
0
440