UPD78F0552MA-FAA-AX Renesas Electronics America, UPD78F0552MA-FAA-AX Datasheet - Page 234

• Manufacturer Part Number: UPD78F0552MA-FAA-AX
• Description: MCU 8BIT 16-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2-Lr

Specifications of UPD78F0552MA-FAA-AX

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 9
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2-L
5.6 Controlling Clock
5.6.1 Example of controlling high-speed system clock
R01UH0028EJ0400 Rev.4.00
Sep 27, 2010
Notes 1.
Cautions 1. A voltage oscillation stabilization time (0.93 to 3.7 ms) is required after the supply voltage
Remark While the microcontroller is operating, a clock that is not used as the CPU clock can be stopped via software
The following two types of high-speed system clocks are available.
• X1 clock:
• External main system clock: External clock is input to the EXCLK pin.
When the high-speed system clock is not used, the X1/P121 and X2/EXCLK/P122 pins can be used as input port pins.
Caution The X1/P121 and X2/EXCLK/P122 pins are in the input port mode after a reset release.
The following describes examples of setting procedures for the following cases.
(1) When oscillating X1 clock
(2) When using external main system clock
(3) When using high-speed system clock as CPU clock and peripheral hardware clock
(4) When stopping high-speed system clock
2.
settings. The internal high-speed oscillation clock and high-speed system clock can be stopped by executing
the STOP instruction (refer to (4) in 5.6.1 Example of controlling high-speed system clock, (3) in 5.6.2
Example of controlling internal high-speed oscillation clock, and (4) in 5.6.3 Example of controlling
subsystem clock).
2. It is not necessary to wait for the oscillation stabilization time when an external clock input from
When releasing a reset (above figure) or releasing STOP mode while the CPU is operating on the internal
high-speed oscillation clock, confirm the oscillation stabilization time for the X1 clock using the oscillation
stabilization time counter status register (OSTC). If the CPU operates on the high-speed system clock (X1
oscillation), set the oscillation stabilization time when releasing STOP mode using the oscillation
stabilization time select register (OSTS).
78K0/KC2-L only
reaches 1.61 V (TYP.). If the supply voltage rises from 1.61 V (TYP.) to 1.91 V (TYP.) within the
power supply oscillation stabilization time, the power supply oscillation stabilization time is
automatically generated before reset processing.
the EXCLK and EXCLKS pins is used.
Crystal/ceramic resonator is connected across the X1 and X2 pins.
CHAPTER 5 CLOCK GENERATOR
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