UPD78F0552MA-FAA-AX Renesas Electronics America, UPD78F0552MA-FAA-AX Datasheet - Page 450

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UPD78F0552MA-FAA-AX

Manufacturer Part Number
UPD78F0552MA-FAA-AX
Description
MCU 8BIT 16-SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2-Lr
Datasheet

Specifications of UPD78F0552MA-FAA-AX

Core Processor
78K/0
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
9
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
78K0/Kx2-L
13.3 Registers Used in Operational Amplifier
(1) Operational amplifier 0 control register (AMP0M), operational amplifier 1 control register (AMP1M)
R01UH0028EJ0400 Rev.4.00
Sep 27, 2010
Address: FF60H After reset: 00H R/W
AMP0M
The operational amplifiers use the following four registers.
• Operational amplifier 0 control register (AMP0M), operational amplifier 1 control register (AMP1M)
• A/D port configuration registers 0 and 1 (ADPC0, ADPC1)
• Analog input channel specification register (ADS)
• Port mode registers 1, 2 (PM1, PM2)
Cautions 1. When using the PGA mode, use the ADPC0 register to select the PGAIN/AMP0OUT/ANI1/P21 pin
Remark The output of operational amplifier 0 is amplified by the PGA by setting OPAMP0E = PGAEN = 1.
Symbol
These registers control the operations of operational amplifiers 0 and 1.
AMP0M and AMP1M can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Remark Products with operational amplifier of the 78K0/KY2-L and 78K0/KA2-L:
2. When using the single AMP mode, use the ADPC0 register to select the
3. When using as digital inputs the pins of port 2, which are not used with the operational amplifier
OPAMP0E
OPAMP0E
AMP0VG1
Products with operational amplifier of the 78K0/KB2-L and 78K0/KC2-L:
<7>
as an analog I/O.
AMP0OUT/PGAIN/ANI1/P21, AMP0-/ANI0/P20, and AMP0+/ANI2/P22 pins as analog I/O.
0, when the operational amplifier 0 is used, make sure that the input levels of digital input ports
are fixed to prevent degradation of the A/D conversion resolution.
0
0
1
1
0
0
1
1
Figure 13-2. Format of Operational Amplifier 0 Control Register (AMP0M)
AMP0VG0
PGAEN
PGAEN
<6>
0
1
0
1
0
1
0
1
(Products with Operational Amplifier Only)
Stops operational amplifier 0 operation
Enables operational amplifier 0 (PGA mode only) operation
Enables operational amplifier 0 (single AMP mode only) operation
Enables operational amplifier 0 (simultaneous operation in the PGA and single AMP
modes) operation
4
8
16
32
5
0
PGA mode of operational amplifier 0 gain selection
Operational amplifier 0 is mounted.
Operational amplifiers 0 and 1 are mounted.
4
0
Operational amplifier 0 operation control
CHAPTER 13 OPERATIONAL AMPLIFIERS
3
0
2
0
AMP0VG1
1
AMP0VG0
0
436

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