SAK-TC1766-192F80HL BD Infineon Technologies, SAK-TC1766-192F80HL BD Datasheet - Page 31
SAK-TC1766-192F80HL BD
Manufacturer Part Number
SAK-TC1766-192F80HL BD
Description
IC MCU 32BIT FLASH PG-LQFP-176
Manufacturer
Infineon Technologies
Series
TC17xxr
Datasheet
1.SAK-TC1766-192F80HL_BD.pdf
(117 pages)
Specifications of SAK-TC1766-192F80HL BD
Core Processor
TriCore
Core Size
32-Bit
Speed
80MHz
Connectivity
ASC, CAN, MLI, MSC, SSC
Peripherals
DMA, POR, WDT
Number Of I /o
81
Program Memory Size
1.5MB (1.5M x 8)
Program Memory Type
FLASH
Ram Size
108K x 8
Voltage - Supply (vcc/vdd)
1.42 V ~ 1.58 V
Data Converters
A/D 2x10b; A/D 32x8b,10b,12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
176-LFQFP
Packages
PG-LQFP-176
Max Clock Frequency
80.0 MHz
Sram (incl. Cache)
108.0 KByte
Can Nodes
2
A / D Input Lines (incl. Fadc)
36
Program Memory
1.5 MB
For Use With
B158-H8539-G2-X-7600IN - KIT STARTER TC176X SERIES
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
KT1766192F80HLBDXT
SAK-TC1766-192F80HLBDINTR
SAK-TC1766-192F80HLBDINTR
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Preliminary
3.3
Table 3-1
implemented in TC1766.
Table 3-1
Seg-
ment
0-7
8
9
10
11
12
13
14
15
Data Sheet
Contents
Global
Global
Memory
Global
Memory
Global
Memory
Global
Memory
Local LMB
Memory
DMI
PMI
EXT_PER
EXT_EMU
BOOTROM
EXTPER
CPU[0 ..15]
image region
LMB_PER
CSFRs
INT_PER
shows the overall architectural address map as defined for the TriCore and as
Architectural Address Map
TC1766 Architectural Address Map
Size
8 x 256
Mbyte
256 Mbyte
256 Mbyte
256 Mbyte
256 Mbyte
256 Mbyte
64 Mbyte
64 Mbyte
96 Mbyte
16 Mbyte
16 Mbyte
128 Mbyte
16 x 8
Mbyte
256
Mbyte
Description
Reserved (MMU space); cached
Reserved (246 Mbyte); PMU, Emulation
memory, Boot ROM; cached
FPI space; cached
Reserved (246 Mbyte), PMU, Emulation
memory, Boot ROM; non-cached
FPI space; non-cached
Reserved; bottom 4 Mbyte visible from FPI bus
in segment 14; cached
Local Data Memory RAM; non-cached
Local Code Memory RAM; non-cached
Reserved; non-cached
Reserved; non-cached
Boot ROM space, Boot ROM mirror;
non-cached
non-speculative; non-cached; no execution
non-speculative; non-cached; no execution
CSFRs of CPUs[0 ..15];
LMB & FPI Peripheral Space;
non-speculative; non-cached;
no execution
Reserved;
27
Functional Description
V1.0, 2008-04
TC1766
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