SAK-TC1766-192F80HL BD Infineon Technologies, SAK-TC1766-192F80HL BD Datasheet - Page 7

• Manufacturer Part Number: SAK-TC1766-192F80HL BD
• Description: IC MCU 32BIT FLASH PG-LQFP-176
• Manufacturer: Infineon Technologies
• Series: TC17xxr

Specifications of SAK-TC1766-192F80HL BD

• Core Processor: TriCore
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: ASC, CAN, MLI, MSC, SSC
• Peripherals: DMA, POR, WDT
• Number Of I /o: 81
• Program Memory Size: 1.5MB (1.5M x 8)
• Program Memory Type: FLASH
• Ram Size: 108K x 8
• Voltage - Supply (vcc/vdd): 1.42 V ~ 1.58 V
• Data Converters: A/D 2x10b; A/D 32x8b,10b,12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 176-LFQFP
• Packages: PG-LQFP-176
• Max Clock Frequency: 80.0 MHz
• Sram (incl. Cache): 108.0 KByte
• Can Nodes: 2
• A / D Input Lines (incl. Fadc): 36
• Program Memory: 1.5 MB
• For Use With: B158-H8539-G2-X-7600IN - KIT STARTER TC176X SERIES
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: KT1766192F80HLBDXT; SAK-TC1766-192F80HLBDINTR

Preliminary
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The TC1766 has the following features:
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• Peripheral Control Processor with single cycle instruction (PCP2)
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Data Sheet
– 8 Kbyte Parameter Memory (PRAM)
– 12 Kbyte Code Memory (CMEM)
High-performance 32-bit super-scaler TriCore v1.3 CPU with 4-stage pipeline
– Superior real-time performance
– Strong bit handling
– Fully integrated DSP capabilities
– Single precision Floating Point Unit (FPU)
– 80 MHz operation at full temperature range
Multiple on-chip memories
– 56 Kbyte Local Data Memory (SRAM)
– 8 Kbyte Overlay Memory
– 16 Kbyte Scratch-Pad RAM (SPRAM)
– 8 Kbyte Instruction Cache (ICACHE)
– 1504 Kbyte Program Flash (for instruction code and constant data)
– 32 Kbyte Data Flash (e.g. 4 Kbyte EEPROM emulation)
– 16 Kbyte Boot ROM
8-channel DMA Controller
Fast-response interrupt system with 2 x 255 hardware priority arbitration levels
serviced by CPU or PCP2
High-performance on-chip bus structure
– 64-bit Local Memory Bus (LMB) to Flash memory
– System Peripheral Bus (SPB) for interconnections of functional units
Versatile on-chip Peripheral Units
– Two Asynchronous/Synchronous Serial Channels (ASCs) with baudrate
– Two High Speed Synchronous Serial Channels (SSCs) with programmable data
– One Micro Second Bus (MSC) interface for serial port expansion to external power
– Two high-speed Micro Link Interfaces (MLIs) for serial inter-processor
– One MultiCAN Module with two CAN nodes and 64 free assignable message
– One General Purpose Timer Array Module (GPTA) with a powerful set of digital
– One 16-channel Analog-to-Digital Converter unit (ADC) with selectable 8-bit, 10-
generator, parity, framing and overrun error detection
length and shift direction
devices
communication
objects for high efficiency data handling via FIFO buffering and gateway data
transfer
signal filtering and timer functionality to realize autonomous and complex
Input/Output management
bit, or 12-bit, supporting 32 input channels
Summary of Features
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Summary of Features
V1.0, 2008-04
TC1766