IP-CPRI Altera, IP-CPRI Datasheet - Page 18

• Manufacturer Part Number: IP-CPRI
• Description: IP CORE - Common Public Radio Interface (CPRI)
• Manufacturer: Altera

Specifications of IP-CPRI

• Software Application: IP CORE, Interface And Protocols, HIGH SPEED
• Supported Families: Arria II GX, Cyclone IV GX, HardCopy IV, Stratix IV
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

2–2
CPRI MegaCore Function User Guide
2. Launch the MegaWizard Plug-in Manager from the Tools menu, and follow the
3. Specify the parameters. For details about these parameters, refer to
4. Click Finish to generate the MegaCore function and supporting files.
5. If you generate the CPRI MegaCore function instance in a Quartus II project, you
You can now integrate your custom MegaCore function variation in your design,
simulate, and compile.
When you integrate your CPRI MegaCore function variation in your design, note the
following connection and I/O assignment requirements:
■
■
■
prompts in the MegaWizard Plug-in Manager interface to create a custom CPRI
MegaCore function variation.
1
Parameter
You might have to wait several minutes for file generation to complete.
are prompted to add the Quartus II IP File (.qip) to the current Quartus II project.
You can also turn on Automatically add Quartus II IP Files to all projects.
The .qip file is generated by the parameter editor, and contains information about
the generated IP core. In most cases, the .qip file contains all of the necessary
assignments and information required to process the MegaCore function or
system in the Quartus II compiler. The parameter editor generates a single .qip file
for each MegaCore function.
Ensure that you connect the calibration clock (gxb_cal_blk_clk) to a clock signal
with the appropriate frequency range of 10–125 MHz. The cal_blk_clk ports on
other components that use transceivers must be connected to the same clock
signal.
In Arria II GX, Arria II GZ, Cyclone IV GX, and Stratix IV GX designs, you must
add a dynamic reconfiguration block (altgx_reconfig) and connect it as specified
in the
Handbook. This block supports offset cancellation to compensate for analog
voltages offset from required ranges due to process variations. The design
compiles without the altgx_reconfig block, but it cannot function correctly in
hardware.
To support the correct signal connections from the CPRI MegaCore function to the
dynamic reconfiguration block, in the ALTGX MegaWizard Plug-in Manager, on
the Reconfiguration Settings tab, turn on Analog controls.
Arria II Device
To select the CPRI MegaCore function, click
Installed Plug-Ins > Interfaces > CPRI.
Settings.
Handbook,
Cyclone IV Device
Handbook, or
MegaWizard Plug-in Manager Design Flow
December 2010 Altera Corporation
Stratix IV Device
Chapter 2: Getting Started
Chapter 3,