IPR-SDRAM/DDR2 Altera, IPR-SDRAM/DDR2 Datasheet - Page 5

• Manufacturer Part Number: IPR-SDRAM/DDR2
• Description: IP CORE Renewal Of IP-SDRAM/DDR2
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-SDRAM/DDR2

• Software Application: IP CORE, Memory Controllers, SDRAM
• Supported Families: Cyclone, HardCopy, Stratix
• Features: Data Mask Signals For Partial Write Operations, Bank Management Architecture
• Core Architecture: FPGA
• Core Sub-architecture: Cyclone, HardCopy, Stratix
• Rohs Compliant: NA
• Function: DDR2 SDRAM Controller
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Release Information
Device Family Support
March 2009 Altera Corporation
Table 1–1
Controller Compiler.
Table 1–1. DDR & DDR2 SDRAM Controller Release Information
MegaCore
device families, as described below:
■
■
Table 1–2
Controller Compiler to each of the Altera device families.
Table 1–2. Device Family Support (Part 1 of 2)
Version
Release Date
Ordering Codes
Product IDs
Vendor ID
Cyclone
Cyclone II
HardCopy
Stratix
Stratix GX
Stratix II
Stratix II GX
Full support means the MegaCore function meets all functional and timing
requirements for the device family and may be used in production designs
Preliminary support means the MegaCore function meets all functional
requirements, but may still be undergoing timing analysis for the device family; it
may be used in production designs with caution
®
®
(1)
®
provides information about this release of the DDR and DDR2 SDRAM
shows the level of support offered by the DDR and DDR2 SDRAM
®
II
functions provide either full or preliminary support for target Altera
Device Family
Item
Full
Full
Preliminary
Full
Full
Full
Full
DDR SDRAM
DDR and DDR2 SDRAM Controller Compiler User Guide
1. About This Compiler
IP-SDRAM/DDR2 (DDR2 SDRAM)
IP-SDRAM/DDR (DDR SDRAM)
00A8 (common library)
00A7 (DDR2 SDRAM)
0055 (DDR SDRAM)
Description
March 2009
Support
6AF7
9.0
No support
Full
Preliminary
No support
No support
Full
Full
DDR2 SDRAM
®