CDB42L52 Cirrus Logic Inc, CDB42L52 Datasheet - Page 29
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CDB42L52
Manufacturer Part Number
CDB42L52
Description
Eval Bd LP Codec W/Class D Spkr Driver
Manufacturer
Cirrus Logic Inc
Specifications of CDB42L52
Main Purpose
Audio, CODEC
Embedded
Yes, FPGA / CPLD
Utilized Ic / Part
CS42L52
Primary Attributes
4 Stereo Audio Inputs, Stereo Line and Speaker Outputs, S/PDIF Inputs and Outputs
Secondary Attributes
GUI, I2C, SPI, USB Interfaces
Description/function
Audio CODECs
Operating Supply Voltage
5 V
Product
Audio Modules
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
CS42L52
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
598-1505
DS680F1
4.3
Referenced Control
DSP
DEEMPH .............................
PMIXxMUTE........................
PMIXxVOL[6:0]....................
INV_PCMx...........................
PCMxSWAP[1:0] .................
AMIXxMUTE........................
AMIXxVOL[6:0]....................
ADCxSWAP[1:0]..................
MSTxVOL[7:0].....................
MSTxMUTE.........................
DIGSFT ...............................
DIGZC .................................
PLYBCKB=A........................
TC_EN.................................
BASS_CF[1:0] .....................
TREB_CF[1:0] .....................
BASS[3:0]............................
TREB[3:0]............................
LIMIT ...................................
LIMSRDIS ...........................
LIMZCDIS............................
LMAX[2:0]............................
CUSH[2:0] ...........................
LIMARATE[7:0]....................
LIMRRATE[7:0] ...................
Analog Outputs
INPUTS FROM ADCA
Digital Mix to ADC
Serial Interface
and ADCB
DEEMPH
Demph
OFFTIME[2:0]
ONTIME[3:0]
FREQ[3:0]
BEEP[1:0]
BEEPMIXDIS
PMIXAMUTE
PMIXBMUTE
PMIXAVOL[6:0]
PMIXBVOL[6:0]
Register Location
“HP/Speaker De-emphasis” on page 53
“PCM Mixer Channel x Mute” on page 58
“PCM Mixer Channel x Volume” on page 58
“Invert PCM Signal Polarity” on page 52
“PCM Mix Channel Swap” on page 64
“ADC Mixer Channel x Mute” on page 58
“ADC Mixer Channel x Volume” on page 58
“ADC Mix Channel Swap” on page 64
“Master Volume Control” on page 63
“Master Playback Mute” on page 52
“Digital Soft Ramp” on page 53
“Digital Zero Cross” on page 53
“Playback Volume Setting B=A” on page 51
“Tone Control Enable” on page 62
“Bass Corner Frequency” on page 62
“Treble Corner Frequency” on page 62
“Bass Gain” on page 63
“Treble Gain” on page 62
“Peak Detect and Limiter” on page 66
“Limiter Soft Ramp Disable” on page 65
“Limiter Zero Cross Disable” on page 66
“Limiter Maximum Threshold” on page 65
“Limiter Cushion Threshold” on page 65
“Limiter Attack Rate” on page 67
“Limiter Release Rate” on page 66
+12dB/-51.5dB
0.5dB steps
INV_PCMA
INV_PCMB
+12dB/-51.5dB
AMIXAMUTE
AMIXBMUTE
AMIXAVOL[6:0]
AMIXBVOL[6:0]
0.5dB steps
VOL
Generator
Beep
VOL
Figure 10. DSP Engine Signal Flow
PCMASWAP[1:0]
PCMBSWAP[1:0]
Channel
Swap
Fixed Function DSP
2.0dB steps
0dB/-50dB
BPVOL[4:0]
VOL
Channel
Swap
Σ
5/13/08
+12dB/-102dB
MSTAVOL[7:0]
MSTBVOL[7:0]
0.5dB steps
ADCASWAP[1:0]
ADCBSWAP[1:0]
Chnl Vol.
Settings
Σ
MSTAMUTE
MSTBMUTE
DIGSFT
DIGZC
PLYBCKB=A
VOL
TC_EN
BASS_CF[1:0]
TREB_CF[1:0]
BASS[3:0]
TREB[3:0]
+12.0dB/-10.5dB
Treble/
Control
1.5dB steps
Bass/
LIMARATE[7:0]
LIMRRATE[7:0]
LMAX[2:0]
CUSH[2:0]
LIMSRDIS
LIMZCDIS
LIMIT
Limiter
Detect
Peak
CS42L52
Modulator
DAC
PWM
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