CDB42L52 Cirrus Logic Inc, CDB42L52 Datasheet - Page 52

• Manufacturer Part Number: CDB42L52
• Description: Eval Bd LP Codec W/Class D Spkr Driver
• Manufacturer: Cirrus Logic Inc

Specifications of CDB42L52

• Main Purpose: Audio, CODEC
• Embedded: Yes, FPGA / CPLD
• Utilized Ic / Part: CS42L52
• Primary Attributes: 4 Stereo Audio Inputs, Stereo Line and Speaker Outputs, S/PDIF Inputs and Outputs
• Secondary Attributes: GUI, I2C, SPI, USB Interfaces
• Description/function: Audio CODECs
• Operating Supply Voltage: 5 V
• Product: Audio Modules
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: CS42L52
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 598-1505

52
6.12.3 Invert PCM Signal Polarity
6.12.4 Master Playback Mute
6.13
6.13.1 Passthrough Analog
6.13.2 Passthrough Mute
6.13.3 Freeze Registers
PASSTHRUB PASSTHRUA PASSBMUTE PASSAMUTE
7
Miscellaneous Controls (Address 0Eh)
Configures the polarity of the digital input signal.
Configures a digital mute on the master volume control for channel x.
Note:
(“Digital Zero Cross” on page
Configures an analog passthrough from the PGA inputs to the headphone/line outputs.
Notes:
1. The Passthrough volume control is realized using a combination of the PGA volume control settings
Configures an analog mute on the channel x analog in to analog out passthrough.
Configures a hold on all register settings.
INV_PCMx
0
1
MSTxMUTE
0
1
PASSTHRUx
0
1
PASSxMUTE
0
1
FREEZE
0
1
(“PGAx Volume” on page
passthrough is enabled and the PGA to ADC path is selected, the signal seen by the ADC will change
depending on the passthrough volume setting.
The muting function is affected by the DIGSFT
6
PCM Signal Polarity
Not Inverted
Inverted
Master Mute
Not Inverted
Inverted
Analog In Routed to HP/Line Output
Disabled
Enabled
Passthrough Mute
Disabled
Enabled
Control Port Status
Register changes take effect immediately
Modifications may be made to all control port registers without the changes taking effect until after the
FREEZE is disabled.
5
53) bits.
56) and the headphone amplifier volume control settings (hidden). When
4
5/13/08
FREEZE
3
(“Digital Soft Ramp” on page
DEEMPH
2
DIGSFT
1
53) and DIGZC
CS42L52
DIGZC
DS680F1
0