CDB42L52 Cirrus Logic Inc, CDB42L52 Datasheet - Page 42
![Eval Bd LP Codec W/Class D Spkr Driver](/photos/9/5/90553/cdb42l52_sml.jpg)
CDB42L52
Manufacturer Part Number
CDB42L52
Description
Eval Bd LP Codec W/Class D Spkr Driver
Manufacturer
Cirrus Logic Inc
Specifications of CDB42L52
Main Purpose
Audio, CODEC
Embedded
Yes, FPGA / CPLD
Utilized Ic / Part
CS42L52
Primary Attributes
4 Stereo Audio Inputs, Stereo Line and Speaker Outputs, S/PDIF Inputs and Outputs
Secondary Attributes
GUI, I2C, SPI, USB Interfaces
Description/function
Audio CODECs
Operating Supply Voltage
5 V
Product
Audio Modules
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
CS42L52
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
598-1505
42
6. REGISTER DESCRIPTION
All registers are read/write except for the chip I.D. and Revision Register and Interrupt Status Register which are
read only. See the following bit definition tables for bit assignment information. The default state of each bit after a
power-up sequence or reset is listed in each bit description. Unless otherwise specified, all “Reserved” bits must
maintain their default value.
6.1
6.1.1
6.1.2
6.2
6.2.1
6.2.2
PDN_CHRG
CHIPID4
7
7
Chip I.D. and Revision Register (Address 01h) (Read Only)
Power Control 1 (Address 02h)
Chip I.D. (Read Only)
I.D. code for the CS42L52.
Chip Revision (Read Only)
CS42L52 revision level.
Power Down ADC Charge Pump
Configures the power state of the ADC charge pump.
Power Down PGAx
Configures the power state of PGA channel x.
Notes:
1. The CS42L52 employs a clever scheme for controlling the power to the PGA when PASSTHRU
2. This bit should be used in conjunction with ADCxSEL and PGAxSEL bits to determine the analog
CHIPID[4:0]
11100
REVID[2:0]
000
001
010
011
PDN_CHRG
0
1
PDN_PGAx
0
1
Application
(“Passthrough Analog” on page
Reserved
CHIPID3
6
6
Device
CS42L52
Revision Level
A0
A1
B0
B1
ADC Charge Pump Status
Powered Up
Powered Down
PGA Status
Powered Up (ONLY when the ADC or the analog passthru is used)
Powered Down
“Analog In to Analog Out Passthrough” on page 32
Reserved
CHIPID2
5
5
PDN_PGAB
52) is enabled. Refer to the referenced application for more information.
CHIPID1
4
4
5/13/08
PDN_PGAA
CHIPID0
3
3
PDN_ADCB
REVID2
2
2
PDN_ADCA
REVID1
1
1
CS42L52
REVID0
DS680F1
PDN
0
0