CDB42L52 Cirrus Logic Inc, CDB42L52 Datasheet - Page 56
![Eval Bd LP Codec W/Class D Spkr Driver](/photos/9/5/90553/cdb42l52_sml.jpg)
CDB42L52
Manufacturer Part Number
CDB42L52
Description
Eval Bd LP Codec W/Class D Spkr Driver
Manufacturer
Cirrus Logic Inc
Specifications of CDB42L52
Main Purpose
Audio, CODEC
Embedded
Yes, FPGA / CPLD
Utilized Ic / Part
CS42L52
Primary Attributes
4 Stereo Audio Inputs, Stereo Line and Speaker Outputs, S/PDIF Inputs and Outputs
Secondary Attributes
GUI, I2C, SPI, USB Interfaces
Description/function
Audio CODECs
Operating Supply Voltage
5 V
Product
Audio Modules
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
CS42L52
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
598-1505
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56
6.16.2 ALCx Zero Cross Disable
6.16.3 PGAx Volume
Configures an override of the analog zero cross setting.
Sets the volume/gain of the Programmable Gain Amplifier (PGA).
Note:
enabled.
ALCxZCDIS
0
1
Application:
PGAxVOL[5:0]
01 1111
...
01 1000
...
00 0001
00 0000
11 1111
...
10 1000
...
10 0000
Step Size:
The PGAxVOL bits are ignored when the PASSTHRUx bit
ALC Zero Cross Disable
OFF; ALC Attack Rate is dictated by the ANLGZC
ON; ALC volume changes take effect at any time, regardless of the ANLGZC setting.
“Automatic Level Control (ALC)” on page 27
Volume
12 dB
...
12 dB
...
+0.5 dB
0 dB
-0.5 dB
...
-6.0 dB
...
-6.0 dB
0.5 dB
5/13/08
(“Ch. x Analog Zero Cross” on page
(“Passthrough Analog” on page
49) setting
CS42L52
DS680F1
52) is
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