CDB42L52 Cirrus Logic Inc, CDB42L52 Datasheet - Page 60

Eval Bd LP Codec W/Class D Spkr Driver

CDB42L52

Manufacturer Part Number
CDB42L52
Description
Eval Bd LP Codec W/Class D Spkr Driver
Manufacturer
Cirrus Logic Inc
Datasheets

Specifications of CDB42L52

Main Purpose
Audio, CODEC
Embedded
Yes, FPGA / CPLD
Utilized Ic / Part
CS42L52
Primary Attributes
4 Stereo Audio Inputs, Stereo Line and Speaker Outputs, S/PDIF Inputs and Outputs
Secondary Attributes
GUI, I2C, SPI, USB Interfaces
Description/function
Audio CODECs
Operating Supply Voltage
5 V
Product
Audio Modules
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
CS42L52
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
598-1505
60
6.21.2 Beep On Time
6.22
6.22.1 Beep Off Time
OFFTIME2
7
Beep Volume & Off Time (Address 1Dh)
Sets the on duration of the beep signal.
Notes:
1. This setting must not change when BEEP is enabled.
2. Beep on time will scale inversely with sample rate, Fs, but is fixed at the nominal Fs within each speed
Sets the off duration of the beep signal.
Notes:
1. This setting must not change when BEEP is enabled.
2. Beep off time will scale inversely with sample rate, Fs, but is fixed at the nominal Fs within each speed
ONTIME[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Application:
OFFTIME[2:0]
000
001
010
011
100
101
110
111
Application:
mode.
mode.
OFFTIME1
6
On Time (Fs = 12, 24, 48 or 96 kHz)
~86 ms
~430 ms
~780 ms
~1.20 s
~1.50 s
~1.80 s
~2.20 s
~2.50 s
~2.80 s
~3.20 s
~3.50 s
~3.80 s
~4.20 s
~4.50 s
~4.80 s
~5.20 s
“Beep Generator” on page 30
Off Time (Fs = 48 or 96 kHz)
~1.23 s
~2.58 s
~3.90 s
~5.20 s
~6.60 s
~8.05 s
~9.35 s
~10.80 s
“Beep Generator” on page 30
OFFTIME0
5
BPVOL4
4
5/13/08
BPVOL3
3
BPVOL2
2
BPVOL1
1
CS42L52
BPVOL0
DS680F1
0

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