LE58QL061BVC Zarlink, LE58QL061BVC Datasheet - Page 73

• Manufacturer Part Number: LE58QL061BVC
• Description: QUAD, SLAC, PROG CODEC, 3.3V, GCI, 20 I/0, PQT44, LEAD FREE
• Manufacturer: Zarlink

*Power Up and Hardware Reset (RST) Value = 00h
SOP 9. Write/Read Configuration Register 5 (CR5), Operating Mode
RSVD:
VOUT Mode (Global parameter)
Low Power Mode (Global parameter)
Power Up and Hardware Reset (RST) Value = 0Fh
SOP 10. Read SLIC Device Input/Output Register
The logic states present on the CD1, CD2, C3, C4, and C5 pins of the QLSLAC device for the addressed channel are read using
this command, independent of their programmed direction (see SLIC device I/O Direction Register). CD1B is the multiplexed CD1
bit and is valid only if the E1 multiplexing mode is enabled (EE = 1). If CD1, CD2, C3, C4, and C5 are programmed as inputs,
then the logic states reported are determined by the external driving signal. In addition, CDA (the debounced state of CD1) and
CDB (the debounced state of CD2, non-E1 multiplexed mode) or CD1B (E1 multiplexed mode), and the logic state present on
the C3 pin of the device are sent directly upstream on the C/I bits of the upstream SC channel. If the CD1, CD2, C3, C4, and C5
pins are programmed as outputs then the logic states of these pins are controlled directly by the bits present in the C/I portion of
the downstream SC channel and are not sent directly upstream in the SC channel. This command is normally used only to read
the bit status via Command 53h. It is also possible although not recommended, if the CD1, CD2, and C3–C7 pins are
programmed as outputs, to write the output state as Command 52h. The register is programmed upon execution of Command
52h but the status is overwritten when the next C/I portion of the downstream SC channel is received.
SOP 11. Write/Read Debounce Time Register*
Enable E1 (Global parameter)
E1 Polarity (Global parameter)
Debounce for hook switch (Global parameter)
Command
Output Data
Command
I/O Data
Command
I/O Data
GCI Command
(4A/4Bh)
Operating Mode (Configuration Register 5, CR5)
GCI Command
(53h)
GCI Command
(C8/C9h)
Reserved for future use. Always write as 0, but 0 is not guaranteed when read.
VMODE = 0*
VMODE = 1
LPM
EE1 = 0*
EE1 = 1
E1P = 0*
E1P = 1
VOUT = VREF through a resistor when channel is inactive
VOUT high impedance when channel is inactive.
LPM reduced the power in the QSLAC device, but it is not needed and not used in the
QLSLAC device
E1 Multiplexing is turned off
E1 Multiplexing is turned on
E1 is a high-going pulse
E1 is a low-going pulse
EE1
C7
D
D
D
0
1
0
7
7
7
RSVD
Zarlink Semiconductor Inc.
E1P
C6
D
D
D
1
1
1
6
6
6
73
CD1B
DSH3
VMODE
D
D
0
0
D
5
5
0
5
DSH2
C5
D
D
1
0
LPM
4
4
D
0
4
DSH1
C4
D
D
0
1
D
3
3
1
3
DSH0
D
C3
D
0
0
D
2
2
0
2
RSVD
RSVD
CD2
D
D
D
1
0
1
1
1
1
CD1
ECH
R/W
R/W
D
D
D
1
0
0
0