TXC-06412BIOG Transwitch Corporation, TXC-06412BIOG Datasheet - Page 192

• Manufacturer Part Number: TXC-06412BIOG
• Manufacturer: Transwitch Corporation

Specifications of TXC-06412BIOG

• Lead Free Status / RoHS Status: Not Compliant

PHAST-12P Device
DATA SHEET
TXC-06412B
PRELIMINARY TXC-06412B-MB, Ed. 2
June 2005
Offset
Offset
0x04C0 11 - 0
0x0000
0x0400 7 - 0
0x0440
0x0480 11 - 0
0x0500
0x0600
0x0000
0x0002
0x0004
0x0006
12.13 POS/ATM DEMAPPER
Bits
Bits
DefectsAndCounters
EgressFIFO_Reset
AUG1_Mode_Config
CorrDefects_Summary
CorrDefects_SummaryMask
Common_Config
Phy_Config
CorrDefects_Unlatched
CorrDefects_LatchForInt
CorrDefects_Mask
PerfCounters_Shadow
Table 49: POS/ATM Demapper Per PHY
Name
Name
Table 48: POS/ATM Demapper
-
Memory Maps and Bit Descriptions
Init
Init
0xFFF rw
0x0 rw
0x0 ro
rw
rw
rw
ro
cow_1
rw
ro/cor
Access
Access
(T_POS_ATM_DEMAPPER)
Array (12) of T_DMP_DefectsAndCounters
page
Offset between two elements = 0x20.
Array index indicates the PHY.
Fields related to defects and performance counters.
Microprocessor Controlled Reset for the Egress FIFO.
Writing the value 0x91 to this register generates a Soft
Reset for the Egress FIFO. Reset is active as long as this
register contains the value 0x91.
T_AUG1_Mode_Config
AUG-1 mode configuration.
Defects summary, one bit per PHY. Least significant bit
corresponds to the first PHY.
Defects summary mask, one bit per PHY. Least
significant bit corresponds to the first PHY.
T_DMP_Common_Config
General configuration.
Array (12) of T_DMP_Phy_Config
Offset between two elements = 0x20.
Array index indicates the PHY.
PHY Configuration.
T_DMP_Defects
Defects.
T_DMP_Defects
Defects latched for interrupt.
T_DMP_Defects
Defects mask.
T_DMP_PerfCounters
Performance counters.
Note: In case the one second performance monitoring
mechanism is enabled, the access type is read-only,
otherwise it is clear-on-read.
(T_DMP_DefectsAndCounters)
192.)
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Description
Description
(See page
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193.)
193.)
193.)
193.)
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177.)
194.)
(See
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194.)