TXC-06412BIOG Transwitch Corporation, TXC-06412BIOG Datasheet - Page 41

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TXC-06412BIOG

Manufacturer Part Number
TXC-06412BIOG
Description
Manufacturer
Transwitch Corporation
Datasheet

Specifications of TXC-06412BIOG

Lead Free Status / RoHS Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TXC-06412BIOG
Manufacturer:
TRANSWITCH
Quantity:
5
4 1 o f 2 2 6
PPUTPRPACLAV3
PPUTPRPACLAV2
PPUTPRPACLAV1
PPUTPRPACLAV0
LRPRXDATA
LRPRXCLK
LRPTXCLK
LRPRXFS
LRPTXFS
Symbol
Symbol
Symbol
Note: The Receive UTOPIA Interface and the Receive POS-PHY Interface share the same
leads.
RECEIVE LINE RING PORT/ALARM INTERFACE
TRANSMIT LINE RING PORT/ALARM INTERFACE
Lead No.
Lead No.
Lead No.
R21
P19
P20
N19
T22
D12
C13
A13
B13
I/O/P
I/O/P
I/O/P
O(T)
O
O
O
I
I
LVCMOS
LVCMOS
LVCMOS
- Lead Descriptions -
LVCMOS
LVTTL
LVTTL
Type
24mA
4mA
4mA
4mA
Type
Type
Receive Line Ring Port Clock: The LRPRXFS and
LRPRXDATA signals are clocked out on the rising
edges of this clock.
Its frequency is 19.44 MHz.
Receive Line Ring Port Frame Sync: An active high,
one LRPRXCLK clock-cycle wide frame sync pulse that
identifies the first bit in the data stream present on
LRPRXDATA.
Receive Line Ring Port Data: A serial frame contain-
ing the remote information, REI and RDI, for the individ-
ual high order path signals.
Receive Polled-PHY Packet Available: High when a
predefined minimum number of words or a complete
packet is available in the polled Rx FIFO, otherwise low.
It is driven when a matching PHY address is presented
on PPUTRXADDR.
Tristated when either the null-PHY address or a not
matching PHY address is presented on PPUTRXADDR.
POS-PHY Standard notation: PRPA
Transmit Line Ring Port Clock: The LRPTXFS and
LRPTXDATA signals are clocked in on the rising edges
of this clock.
Its frequency is 19.44 MHz.
When this lead is not connected to LRPRXCLK of a
mate PHAST-12P device, it must be tied to VSS.
Transmit Line Ring Port Frame Sync: An active high,
one LRPTXCLK clock-cycle wide frame sync pulse that
identifies the first bit in the data stream present on
LRPTXDATA.
When this lead is not connected to LRPRXFS of a mate
PHAST-12P device, it must be tied to VSS.
Name/Function
Name/Function
Name/Function
PRELIMINARY TXC-06412B-MB, Ed. 2
PHAST-12P Device
DATA SHEET
TXC-06412B
June 2005

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