TXC-06412BIOG Transwitch Corporation, TXC-06412BIOG Datasheet - Page 91

• Manufacturer Part Number: TXC-06412BIOG
• Manufacturer: Transwitch Corporation

Specifications of TXC-06412BIOG

• Lead Free Status / RoHS Status: Not Compliant

9 1 o f 2 2 6
STM4_Mode
TimeSlotIsConcatenated
0 (Default)
10.1 MODES
1
10.1.1 Line Interface Mode
10.1.2 SDH/SONET Mapping
0 (Default)
The PHAST-12P supports either one STM-4/OC-12 line interface, or four STM-1/OC-3 line
interfaces.
In STM-4/OC-12 mode line interfaces #2 to #4 will not be used.
The PHAST-12P supports the SDH/SONET structures presented in
receive and transmit line interfaces, receive and transmit APS port interfaces, and receive
and transmit terminal side interfaces is independent. All mapping configurations default to all
AU-4/VC-4 resp. STS-3c.
In STM-4/OC-12 mode the line interface transports a single AUG-4. A standard AUG-4
consists either of a single VC-4-4c/STS-12c or four AUG-1’s. To support non-standard VC-4-
2c/STS-6c SPE and VC-4-3c/STS-9c SPE contiguous concatenated containers a
TimeSlotIsConcatenated register is provided per AUG-1 time slot.
1
STM-1/OC-3 Mode: line interfaces #1 to #4 are 155.52 Mbit/s signals.
STM-4/OC-12 Mode: line interface #1 is a 622.08 Mbit/s signal,
line interfaces #2 to #4 are not used.
[aug1]
The AUG-1 time slot is either not part of a contiguous concatenated
container, or it is the master time slot (i.e., it carries the POH column)
of a VC-4-Xc resp. STS-Nc contiguous concatenated container.
The AUG-1 time slot is a slave (i.e., it does not carry the POH
column) of a VC-4-Xc resp. STS-Nc contiguous concatenated
container.
- Operation -
Description
Description
10.0 O
PRELIMINARY TXC-06412B-MB, Ed. 2
Figure
PHAST-12P Device
PERATION
1. The mapping of
DATA SHEET
TXC-06412B
June 2005