TXC-06412BIOG Transwitch Corporation, TXC-06412BIOG Datasheet - Page 51

• Manufacturer Part Number: TXC-06412BIOG
• Manufacturer: Transwitch Corporation

Specifications of TXC-06412BIOG

• Lead Free Status / RoHS Status: Not Compliant

5 1 o f 2 2 6
Symbol
MPCLK
MPA13
MPA12
MPA11
MPA10
MPA09
MPA08
MPA07
MPA06
MPA05
MPA04
MPA03
MPA02
MPA01
MPA00
MPINTR
MPACK
MPWR
MOTOROLA MPC8260 LOCAL BUS - HOST PROCESSOR INTERFACE
Lead No.
M1
C2
D2
C1
G4
D1
B1
E4
E3
F4
B2
E2
F3
E1
F2
B3
L2
L1
I/O/P
I
I
O(T) LVCMOS
O
I
LVTTL Microprocessor Clock: This lead is the clock sourced by the
LVTTL Local Address Bus: These leads are the address bus used
Type
LVCMOS
LVTTL Read/Write (Active Low): This active low lead indicates
- Lead Descriptions -
24mA
8mA
microprocessor being interfaced to this device.
Its max. frequency is 50 MHz.
Motorola MPC8260 Notation: CLK
by the host processor for accessing the PHAST-12P for a
read or write cycle.
MPA13 is the most significant bit in the location’s address.
Motorola MPC8260 Notation: L_A[ ]
that the actual transfer between the host processor and
the PHAST-12P is a write transfer.
Motorola MPC860 notation: RD/WR
Transfer Acknowledge (Active Low): This active low
lead is used to acknowledge a host processor access. It is
synchronous to the MPCLK. To acknowledge an access,
MPACK is asserted during 1 MPCLK cycle.
For a write access, an acknowledge indicates that data is
written to the addressed memory location. For a read
access, an acknowledge indicates that the data to be read
from the addressed memory location is available on the
data bus.
Motorola MPC860 notation: TA
Interrupt: This lead signals an interrupt request to the host
processor. Active level depends on MPINTLEVEL.
Note: MPC860 expects active low interrupt, requiring
MPINTLEVEL to be low.
Name/Function
PRELIMINARY TXC-06412B-MB, Ed. 2
PHAST-12P Device
DATA SHEET
TXC-06412B
June 2005