MCF5282CVM66 Freescale, MCF5282CVM66 Datasheet - Page 112

• Manufacturer Part Number: MCF5282CVM66
• Manufacturer: Freescale

Specifications of MCF5282CVM66

• Cpu Family: MCF528x
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 66MHz
• Interface Type: CAN/I2C/QSPI/UART
• Total Internal Ram Size: 64KB
• # I/os (max): 150
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 3.3V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 256
• Package Type: MA-BGA
• Program Memory Type: Flash
• Program Memory Size: 512KB
• Lead Free Status / RoHS Status: Compliant

Static RAM (SRAM)
The following loop initializes the entire SRAM to zero
lea.l
move.l
SRAM_INIT_LOOP:
clr.l
subq.l
bne.b
5.3.4
As noted previously, depending on the configuration defined by the RAMBAR, instruction fetch and
operand read accesses may be sent to the SRAM and cache simultaneously. If the access is mapped to the
SRAM module, it sources the read data and the unified cache access is discarded. If the SRAM is used
only for data operands, asserting the ASn bits associated with instruction fetches can decrease power
dissipation. Additionally, if the SRAM contains only instructions, masking operand accesses can reduce
power dissipation.
5-4
Power Management
Table 5-2
RAMBASE,A0
#16384,D0
(A0)+)
#1,D0
SRAM_INIT_LOOP
Data Contained in SRAM
Both Code And Data
shows some examples of typical RAMBAR settings.
Table 5-2. Typical RAMBAR Setting Examples
Code Only
Data Only
;load pointer to SRAM
;load loop counter into D0
;clear 4 bytes of SRAM
;decrement loop counter
;if done, then exit; else continue looping
RAMBAR[7:0]
0x2B
0x35
0x21
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