CYNSE10512A-133FGC Cypress Semiconductor Corp, CYNSE10512A-133FGC Datasheet - Page 5

• Manufacturer Part Number: CYNSE10512A-133FGC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CYNSE10512A-133FGC

• Operating Supply Voltage (typ): 1.2V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

Document #: 38-02110 Rev. *B
Figure 6-10. Hardware Diagram for a Table with Eight Devices ............................................................62
Figure 6-11. Timing Diagram for 72-bit Search Device Number 0 .........................................................63
Figure 6-12. Timing Diagram for 72-bit Search Device Number 1 .........................................................64
Figure 6-13. Timing Diagram for 72-bit Search Device Number 7 (Last Device)...................................65
Figure 6-14. ×72 Table with Eight Devices ............................................................................................66
Figure 6-15. Hardware Diagram for a Table with 31 Devices ................................................................68
Figure 6-16. 144-bit Search for Devices in Block #0 and Above Block #1 Winning Device...................69
Figure 6-17. 144-bit Search Timing Diagram for Block #1 Global Winning Device................................70
Figure 6-18. 144-bit Search Timing Diagram for Devices Below Block #1 Winning Device ..................71
Figure 6-19. 144-bit Search Timing Diagram for Devices Above Block #2 Winning Device ..................72
Figure 6-20. 144-bit Search Timing Diagram for Block #2 Global Winning Device................................73
Figure 6-21. 144-bit Search Timing Diagram for Devices Below Block #2 Winning Device ..................74
Figure 6-22. 144-bit Search Timing Diagram for Devices Above Block #3 Winning Device ..................75
Figure 6-23. 144-bit Search Timing Diagram for Block #3 Global Winning Device................................76
Figure 6-24. 144-bit Search Diagram Below Block #3 Winning Device Except the Last Device ...........77
Figure 6-25. 144-bit Search Timing Diagram for Device Number 6 in Block #3 ....................................78
Figure 6-26. ×144 Table with 31 Devices ..............................................................................................79
Figure 6-27. Timing Diagram for 576-bit Single Search Device Number 0 ............................................81
Figure 6-28. Timing Diagram for 576-bit Single Search Device Number 1 ............................................82
Figure 6-29. Timing Diagram for 576-bit Single Search Device Number 7 (Last Device)......................83
Figure 6-30. ×576 Table with Eight Devices ..........................................................................................84
Figure 6-31. Multiwidth Configurations Example with CYNSE10512As.................................................85
Figure 6-32. Timing Diagram for Mixed Search for Devices Above Block 0 Winning Device ................86
Figure 6-33. Timing Diagram for Mixed Search for Block 0 Winning Device .........................................87
Figure 6-34. Timing Diagram for Mixed Search for Devices Below Block 0 Winning Device.................88
Figure 6-35. Timing Diagram for Mixed Search Above Block 1 Winning Device ...................................89
Figure 6-36. Timing Diagram for Mixed Search for Block 1 Winning Device .........................................90
Figure 6-37. Timing Diagram for Mixed Search Below Block 1 Winning Device....................................91
Figure 6-38. Timing Diagram for Mixed Search Above Block 2 Winning Device ...................................92
Figure 6-39. Timing Diagram for Mixed Search for Block 2 Winning Device .........................................93
Figure 6-40. Timing Diagram for Mixed Search Below Block 2 Winning Device....................................94
Figure 6-41. Timing Diagram for Mixed Search for All Except the Last Device in Block 3.....................95
Figure 6-42. Timing Diagram for Mixed Search for the Last Device in Block 3......................................96
Figure 6-43. Hardware Diagram for a Table with Eight Devices for MultiSearch...................................98
Figure 6-44. Multiwidth Configurations Example for MultiSearch with CYNSE10512As .......................99
Figure 6-45. Timing Diagram for Mixed MultiSearch (Eight Devices) for Device 0 ..............................100
Figure 6-46. Timing Diagram for Mixed MultiSearch (Eight Devices) for Device 1 ..............................101
Figure 6-47. Timing Diagram for Mixed MultiSearch (Eight Devices) for Device 2 ..............................102
Figure 6-48. Timing Diagram for Mixed MultiSearch (Eight Devices) for Device 7 ..............................103
Figure 6-49. Timing Diagram of 72-bit Learn from DQ Bus and CMPR Registers (One Device) ........105
Figure 6-50. Timing Diagram of 288-bit Learn from DQ Bus and CMPR Registers (One Device) ......106
Figure 6-51. Timing Diagram of 576-bit Learn from DQ Bus (One Device) .........................................107
Figure 6-52. Timing Diagram of 576-bit Learn from CMPR Register (One Device).............................108
Figure 6-53. Timing Diagram of Learn .................................................................................................109
Figure 6-54. Timing Diagram of Learn (Except on the Last Device [TLSZ = 01 (binary)])...................110
Figure 6-55. Timing Diagram of Learn on Device Number 7 (TLSZ = 01 (binary))..............................111
Figure 6-56. SRAM Read Access ........................................................................................................113
Figure 6-57. Hardware Diagram of a Block of Eight Devices...............................................................114
Figure 6-58. SRAM Read of Device #0 in a Block of Eight Devices ....................................................115
CONFIDENTIAL
LIST OF FIGURES
(continued)
CYNSE10512A
CYNSE10256A
CYNSE10128A
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