CYNSE10512A-133FGC Cypress Semiconductor Corp, CYNSE10512A-133FGC Datasheet - Page 50

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CYNSE10512A-133FGC

Manufacturer Part Number
CYNSE10512A-133FGC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CYNSE10512A-133FGC

Operating Supply Voltage (typ)
1.2V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant
Document #: 38-02110 Rev. *B
6.0
A master device, such as an ASIC controller, issues commands to the Ayama 10000A device using the CMD bus and CMDV
signals. The following subsections describe the operation of these commands.
6.1
The Ayama 10000A device implements four basic commands, as shown in Table 6-1. The Search command is a non-blocking
operation which allows another operation to be issued immediately on the following cycle. Read, Write and Learn are blocking
operations. There are also other derivative commands that the device supports. The operation of basic commands as well as the
derivative commands are explained in more detail in the following sections.
The command code must be presented to CMD[1:0] while keeping the CMDV signal HIGH for two CLK2X cycles (cycles A and
B) when the CLK_MODE pin is LOW. In CLK2X mode, the controller ASIC must align the instructions using the PHS_L signal.
The command code must be presented to CMD[1:0] while keeping the CMDV signal HIGH for one CLK1X cycle when the
CLK_MODE pin is HIGH. In CLK1X mode, cycle A ends on the falling edge of CLK1X and cycle B ends on the rising edge of
CLK1X. Valid data must be present at the edge ending any given cycle for valid inputs. The CMD[10:2] field passes command
parameters in cycles A and B. All commands must begin with cycle A operations.
Table 6-1. Command Codes
6.2
6.2.1
The EADR field of the CMD bus, CMD[8:6], allows flexibility in the accessing of associated data SRAM. For all operations, the
EADR field is mapped to the most significant bits of the SADR output bus. SADR[25:23] for CYNSE10512A, SADR[24:22] for
CYNSE10256A, and SADR[23:21] for CYNSE10128A.
This field allows for the specific region of the associated data address space to be targeted for an operation. One practical
application of this is when two 36-bit keys are packed into a single 72-bit NSE entry. This is because the Ayama 10000A NSE is
72-bit addressable and outputs a single index for each 72-bit entry. In this case, the EADR field is used to differentiate between
the two keys.
6.2.2
Table 6-2, Table 6-3, and Table 6-4 list the command bus fields that contain the Ayama 10000A command parameters and their
respective cycles.
Command Code
(binary)
Command Encoding
Command Bus Parameters
Extended Address (EADR)
Enhanced Mode and Non-Enhanced Mode Parameters
00
01
10
11
Operations and Timing Diagrams
Command
Search
Learn
Read
Write
Reads from one of the following: data array, mask array, device registers, or external SRAM.
Read command is also used to issue Read Parity command.
Writes to one of the following: data array, mask array, device registers, or external SRAM.
Searches the data array for a desired pattern using the specified register from the GMR
array and local mask associated with each data cell.
The device has internal storage for up to sixteen comparands that it can learn. The device
controller can insert these entries at the next-free address (as specified by the NFA register)
using the Learn instruction.
CONFIDENTIAL
Description
CYNSE10512A
CYNSE10256A
CYNSE10128A
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