CYNSE10512A-133FGC Cypress Semiconductor Corp, CYNSE10512A-133FGC Datasheet - Page 6

• Manufacturer Part Number: CYNSE10512A-133FGC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CYNSE10512A-133FGC

• Operating Supply Voltage (typ): 1.2V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Not Compliant

Document #: 38-02110 Rev. *B
Figure 6-59. SRAM Read Timing of Device #7 in a Block of Eight Devices ........................................116
Figure 6-60. Hardware Diagram of 31 Devices Using Four Blocks......................................................117
Figure 6-61. SRAM Read of Device #0 in a Bank of 31 Devices .........................................................117
Figure 6-62. SRAM Read of Device #0 in a Bank of 31 Devices .........................................................118
Figure 6-63. SRAM Write Access ........................................................................................................119
Figure 6-64. Hardware Diagram of a Block of Eight Devices...............................................................120
Figure 6-65. SRAM Write of Device #0 in a Block of Eight Devices ....................................................121
Figure 6-66. SRAM Write Timing of Device #7 in Block of Eight Devices............................................122
Figure 6-67. Table of 31 Devices (Four Blocks)...................................................................................123
Figure 6-68. SRAM Write of Device #0 in Bank of 31 Devices ............................................................123
Figure 6-69. SRAM Write Through Device #30 in Bank of 31 Devices................................................124
Figure 6-70. Timing Diagram for Full Signal (TLSZ = 10) ....................................................................125
Figure 8-1. Typical Power Consumption of Ayama 10512A ................................................................127
Figure 10-1. AC Timing Waveforms with CLK2X .................................................................................130
Figure 10-2. AC Timing Waveforms with CLK1X .................................................................................133
Figure 10-3. HSTL I/II I/O Input Waveform ..........................................................................................134
Figure 10-4. Test Condition of HSTL I I/O Output Load Equivalent .....................................................134
Figure 10-5. Test Condition of HSTL II I/O Output Load Equivalent ....................................................134
Figure 10-6. Test Condition of HSTLI/II I/O High-Z Output Load Equivalent .......................................134
Figure 10-7. LVCMOS I/O Input Waveform .........................................................................................135
Figure 10-8. Test Condition of 2.5V LVCMOS I/O Output Load Equivalent.........................................135
Figure 10-9. Test Condition of 2.5V High-Z LVCMOS I/O Output Load Equivalent.............................135
Figure 10-10. Test Condition of 1.8V High-Z LVCMOS I/O Output Load Equivalent...........................135
Figure 11-1. Pinout Diagram (Top View)..............................................................................................136
CONFIDENTIAL
LIST OF FIGURES
(continued)
CYNSE10512A
CYNSE10256A
CYNSE10128A
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