EP1S10F780I6N Altera, EP1S10F780I6N Datasheet - Page 621

IC STRATIX FPGA 10K LE 780-FBGA

EP1S10F780I6N

Manufacturer Part Number
EP1S10F780I6N
Description
IC STRATIX FPGA 10K LE 780-FBGA
Manufacturer
Altera
Series
Stratix®r
Datasheet

Specifications of EP1S10F780I6N

Number Of Logic Elements/cells
10570
Number Of Labs/clbs
1057
Total Ram Bits
920448
Number Of I /o
426
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
780-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-

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0
Altera Corporation
September 2004
Implementing High Performance DSP Functions in Stratix & Stratix GX Devices
The DSP block in
The three external adders are implemented in logic elements and
therefore are not part of the DSP block. Therefore, for an 18-bit input, each
biquad requires half a DSP block and three logic element adders. The gain
factor can be compensated for at the end of the filtering stage and is not
shown in this simple example. More complex, higher order Butterworth
filters can be realized by cascading several biquads together, as in the IIR
example.
two cascaded biquads in a single DSP block.
Figure 7–25
Figure 7–24
below shows a 4th order Butterworth filter using
is configured in multiply and add mode.
Stratix Device Handbook, Volume 2
7–43

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