EP1S10F780I6N Altera, EP1S10F780I6N Datasheet - Page 699

IC STRATIX FPGA 10K LE 780-FBGA

EP1S10F780I6N

Manufacturer Part Number
EP1S10F780I6N
Description
IC STRATIX FPGA 10K LE 780-FBGA
Manufacturer
Altera
Series
Stratix®r
Datasheet

Specifications of EP1S10F780I6N

Number Of Logic Elements/cells
10570
Number Of Labs/clbs
1057
Total Ram Bits
920448
Number Of I /o
426
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
780-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP1S10F780I6N
Manufacturer:
ALTERA
Quantity:
3 000
Part Number:
EP1S10F780I6N
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EP1S10F780I6N
Manufacturer:
ALTERA
0
Altera Corporation
July 2005
Note to
(1)
Single-port
Multi-port (two-,
three-, or four-port
functions)
Dual-port
Dual-port
Single-port
No clock
Table 10–5. Migration Mode Summary
Configuration
If the SUPPRESS_MEMORY_COUNVERSION_WARNINGS parameter is turned on, the Quartus II software does not
issue these warnings.
Memory
Table
10–5:
All inputs are registered.
All inputs are registered.
Read-enable ports are
unregistered.
Other inputs registered.
Any other unregistered
port except read-enable
ports.
Clock available.
At least one registered
input.
Clock available.
No clock.
Conditions
There are differences in power-up behavior between APEX II,
APEX 20K, and Stratix and Stratix GX devices. You should manually
account for these differences to maintain desired operation of the
system.
altram
altrom
lpm_ram_dq
lpm_ram_io
lpm_rom
altdpram
lpm_ram_dp
altqpram
alt3pram
altdpram
lpm_ram_dp
altqpram
alt3pram
altdpram
lpm_ram_dp
altqpram
alt3pram
altram
lpm_ram_dq
lpm_ram_io
altram
altrom
altdpram
altqpram
alt3pram
altdpram
lpm_ram_dq
lpm_ram_io
lpm_rom
lpm_ram_dp
lpm_ram_dp
Transitioning APEX Designs to Stratix & Stratix GX Devices
Megafunctions
Instantiated
Possible
Power-up differences.
Power-up differences.
Mixed-port read- during-
write.
Power-up differences.
Mixed-port read- during-
write.
Read enable will be
registered.
Compile for fitting- evaluation
purposes.
Compile for fitting- evaluation
purposes.
Error – no conversion
possible.
Quartus II Warning
(1)
Stratix Device Handbook, Volume 2
Message(s)
(1)
(1)
Yes
Yes
Yes
No
No
No
Programming
Generated
File
10–15

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