EP1S10F780I6N Altera, EP1S10F780I6N Datasheet - Page 794

• Manufacturer Part Number: EP1S10F780I6N
• Description: IC STRATIX FPGA 10K LE 780-FBGA
• Manufacturer: Altera
• Series: Stratix®r

Specifications of EP1S10F780I6N

• Number Of Logic Elements/cells: 10570
• Number Of Labs/clbs: 1057
• Total Ram Bits: 920448
• Number Of I /o: 426
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 780-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Quartus II Software Support
12–16
Stratix Device Handbook, Volume 2
Note to
(1)
Status
Register
Contents
Watchdog
Timeout Value
Watchdog
Enable
data_out[11..0]
pgm_out[2..0]
Table 12–7. Output Ports of the altremote_update Megafunction
Table 12–8. Parameter Settings for the altremote_update Megafunction (Part 1 of 2)
Parameter
Port Name
Selected
Logic array destination means that you can drive the port to internal logic or any general-purpose I/O pin.
busy
Table
12–7:
param[2..0]
Required Destination
bit setting
000
010
011
Y
Y
N
Logic Array When this signal is a logic high, the remote update block is busy
Logic Array 12-bit bus used when reading parameters, which reads out the
PGM[2..0]
parameter
pins
width of
value
12
5
1
either reading or writing a parameter. When the remote update block
is busy, it ignores its
inputs. This signal will go high when
write_param
operation is complete.
3-bit bus that specifies the page pointer of the configuration data to
be loaded when the device is reconfigured. This port must be
connected to the
the external configuration device
parameter value. The parameter value is requested using the
param[]
at which point the busy signal will go logic high. When the busy signal
goes low, the value of the parameter will be driven out on this bus.
The
issued and once the busy signal is de-asserted. At any other time, its
output values are invalid. For example, even though the
data_out[]
values are not a valid representation of what was actually written to
the remote update block. For some parameters, not all 12-bits will be
used in which case only the least significant bits will be used.
data_out[]
POR Reset
12 bits '0
5 bit '0
1 bit '0
Value
input and by driving the
port may toggle during a writing of a parameter, these
is asserted and will remain asserted until the
PGM[]
port is only valid after a read_param has been
data_in[]
Specifies the reason for re-configuration,
which could be caused by a CRC error during
configuration,
to an error, the device core caused an error,
nCONFIG
timed-out. This parameter can only be read.
User watchdog timer time-out value. Writing of
this parameter is only allowed when in the
factory configuration.
User watchdog timer enable. Writing of this
parameter is only allowed when in the factory
configuration
output pins, which should be connected to
Description
pulled low, or the watchdog timer
,
read_param
param[]
nSTATUS
read_param
Description
, and
being pulled low due
Altera Corporation
signal logic high,
September 2004
reconfig
or