C8051F411-GMR Silicon Laboratories Inc, C8051F411-GMR Datasheet - Page 111

Microcontrollers (MCU) 50 MIPS 32KB 12ADC RTCLOCK 28 PIN MCU

C8051F411-GMR

Manufacturer Part Number
C8051F411-GMR
Description
Microcontrollers (MCU) 50 MIPS 32KB 12ADC RTCLOCK 28 PIN MCU
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of C8051F411-GMR

Processor Series
C8051F4x
Core
8051
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
32 KB
Data Ram Size
2.25 KB
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
20
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
QFN
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F410DK
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 20 Channel
On-chip Dac
12 bit, 2 Channel
Package
28QFN EP
Device Core
8051
Family Name
C8051F41x
Maximum Speed
50 MHz
Ram Size
2.25 KB
Operating Supply Voltage
1.8|2.5|3.3|5 V
Operating Temperature
-40 to 85 °C
Lead Free Status / Rohs Status
 Details

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instruction. In this case, the response time is 19 system clock cycles: 1 clock cycle to detect the interrupt,
5 clock cycles to execute the RETI, 8 clock cycles to complete the DIV instruction and 5 clock cycles to exe-
cute the LCALL to the ISR. If the CPU is executing an ISR for an interrupt with equal or higher priority, the
new interrupt will not be serviced until the current ISR completes, including the RETI and following instruc-
tion.
Interrupt Source
Reset
External Interrupt 0 (/INT0) 0x0003
Timer 0 Overflow
External Interrupt 1 (/INT1) 0x0013
Timer 1 Overflow
UART0
Timer 2 Overflow
SPI0
SMB0
smaRTClock
ADC0 Window
Comparator
ADC0 End of Conversion
Programmable Counter
Array
Comparator0
Comparator1
Timer 3 Overflow
Voltage Regulator Dropout 0x007B
Port Match
Interrupt
Vector
0x0000
0x000B
0x001B
0x0023
0x002B
0x0033
0x003B
0x0043
0x004B
0x0053
0x005B
0x0063
0x006B
0x0073
0x0083
Table 12.1. Interrupt Summary
Priority
Order
Top
10
11
12
13
14
15
16
0
1
2
3
4
5
6
7
8
9
Pending Flag
None
IE0 (TCON.1)
TF0 (TCON.5)
IE1 (TCON.3)
TF1 (TCON.7)
RI0 (SCON0.0)
TI0 (SCON0.1)
TF2H (TMR2CN.7)
TF2L (TMR2CN.6)
SPIF (SPI0CN.7) 
WCOL (SPI0CN.6)
MODF (SPI0CN.5)
RXOVRN (SPI0CN.4)
SI (SMB0CN.0)
ALRM (RTC0CN.2)
OSCFAIL
(RTC0CN.5)
AD0WINT
(ADC0CN.3)
AD0INT (ADC0STA.5)
CF (PCA0CN.7)
CCFn (PCA0CN.n)
CP0FIF (CPT0CN.4)
CP0RIF (CPT0CN.5)
CP1FIF (CPT1CN.4)
CP1RIF (CPT1CN.5)
TF3H (TMR3CN.7)
TF3L (TMR3CN.6)
N/A
N/A
Rev. 1.1
C8051F410/1/2/3
N/A N/A
N/A N/A
N/A N/A
Y
Y
Y
Y
N
N
N
N
Y
Y
Y
Y
Y
Y
Y
N
N
N
N
N
N
N
N
N
N
N
Y
Y
Y
Y
Enable
Flag
EX0 (IE.0) PX0 (IP.0)
EX1 (IE.2) PX1 (IP.2)
ES0 (IE.4) PS0 (IP.4)
ET0 (IE.1)
ET1 (IE.3)
ET2 (IE.5)
EWADC0
Enabled
(EIE1.0)
(EIE1.1)
(EIE1.2)
(EIE1.3)
(EIE1.4)
(EIE1.5)
(EIE1.6)
(EIE1.7)
(EIE2.0)
(EIE2.1)
ESMB0
EADC0
EREG0
ERTC0
EPCA0
Always
ESPI0
EMAT
ECP0
ECP1
(IE.6)
ET3
Priority
Control
PT2 (IP.5)
PT0 (IP.1)
PT1 (IP.3)
PWADC0
(EIP1.0)
(EIP1.1)
(EIP1.2)
(EIP1.3)
(EIP1.4)
(EIP1.5)
(EIP1.6)
(EIP1.7)
(EIP2.0)
(EIP2.1)
Highest
PSMB0
PREG0
PRTC0
PADC0
PPCA0
Always
PSPI0
PMAT
PCP0
PCP1
(IP.6)
PT3
111

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