C8051F411-GMR Silicon Laboratories Inc, C8051F411-GMR Datasheet - Page 9

• Manufacturer Part Number: C8051F411-GMR
• Description: Microcontrollers (MCU) 50 MIPS 32KB 12ADC RTCLOCK 28 PIN MCU
• Manufacturer: Silicon Laboratories Inc

Specifications of C8051F411-GMR

• Processor Series: C8051F4x
• Core: 8051
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 32 KB
• Data Ram Size: 2.25 KB
• Interface Type: I2C, SMBus, SPI, UART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 20
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: QFN
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F410DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 20 Channel
• On-chip Dac: 12 bit, 2 Channel
• Package: 28QFN EP
• Device Core: 8051
• Family Name: C8051F41x
• Maximum Speed: 50 MHz
• Ram Size: 2.25 KB
• Operating Supply Voltage: 1.8|2.5|3.3|5 V
• Operating Temperature: -40 to 85 °C
• Lead Free Status / Rohs Status: Details

List of Figures
1. System Overview
2. Absolute Maximum Ratings
3. Global DC Electrical Characteristics
4. Pinout and Package Definitions
5. 12-Bit ADC (ADC0)
6. 12-Bit Current Mode DACs (IDA0 and IDA1)
7. Voltage Reference
8. Voltage Regulator (REG0)
9. Comparators
Figure 1.1. C8051F410 Block Diagram .................................................................... 21
Figure 1.2. C8051F411 Block Diagram .................................................................... 22
Figure 1.3. C8051F412 Block Diagram .................................................................... 23
Figure 1.4. C8051F413 Block Diagram .................................................................... 24
Figure 1.5. Development/In-System Debug Diagram............................................... 26
Figure 1.6. Memory Map .......................................................................................... 27
Figure 1.7. 12-Bit ADC Block Diagram..................................................................... 29
Figure 1.8. IDAC Block Diagram .............................................................................. 30
Figure 1.9. Comparators Block Diagram .................................................................. 31
Figure 1.10. smaRTClock Block Diagram ................................................................ 32
Figure 1.11. Port I/O Functional Block Diagram ....................................................... 33
Figure 1.12. PCA Block Diagram.............................................................................. 34
Figure 4.1. LQFP-32 Pinout Diagram (Top View) .................................................... 44
Figure 4.2. QFN-28 Pinout Diagram (Top View) ...................................................... 45
Figure 4.3. LQFP-32 Package Diagram ................................................................... 46
Figure 4.4. LQFP-32 Recommended PCB Land Pattern ......................................... 47
Figure 4.5. QFN-28 Package Drawing ..................................................................... 48
Figure 4.6. QFN-28 Recommended PCB Land Pattern ........................................... 49
Figure 5.1. ADC0 Functional Block Diagram............................................................ 51
Figure 5.2. Typical Temperature Sensor Transfer Function..................................... 52
Figure 5.3. ADC0 Tracking Modes ........................................................................... 54
Figure 5.4. 12-Bit ADC Tracking Mode Example ..................................................... 55
Figure 5.5. 12-Bit ADC Burst Mode Example with Repeat Count Set to 4............... 56
Figure 5.6. ADC0 Equivalent Input Circuits.............................................................. 58
Figure 5.7. ADC Window Compare Example: Right-Justified Single-Ended Data ... 66
Figure 5.8. ADC Window Compare Example: Left-Justified Single-Ended Data ..... 66
Figure 6.1. IDAC Functional Block Diagram............................................................. 69
Figure 6.2. IDAC Data Word Mapping...................................................................... 70
Figure 6.3. IDAC Pin Connections ........................................................................... 74
Figure 7.1. Voltage Reference Functional Block Diagram ....................................... 77
Figure 8.1. External Capacitors for Voltage Regulator Input/Output ........................ 81
Figure 8.2. External Capacitors for Voltage Regulator Input/Output ........................ 81
Figure 9.1. Comparator0 Functional Block Diagram ................................................ 83
Figure 9.2. Comparator1 Functional Block Diagram ................................................ 84
Rev. 1.1
C8051F410/1/2/3
9