C8051F411-GMR Silicon Laboratories Inc, C8051F411-GMR Datasheet - Page 236

• Manufacturer Part Number: C8051F411-GMR
• Description: Microcontrollers (MCU) 50 MIPS 32KB 12ADC RTCLOCK 28 PIN MCU
• Manufacturer: Silicon Laboratories Inc

Specifications of C8051F411-GMR

• Processor Series: C8051F4x
• Core: 8051
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 32 KB
• Data Ram Size: 2.25 KB
• Interface Type: I2C, SMBus, SPI, UART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 20
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: QFN
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F410DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 20 Channel
• On-chip Dac: 12 bit, 2 Channel
• Package: 28QFN EP
• Device Core: 8051
• Family Name: C8051F41x
• Maximum Speed: 50 MHz
• Ram Size: 2.25 KB
• Operating Supply Voltage: 1.8|2.5|3.3|5 V
• Operating Temperature: -40 to 85 °C
• Lead Free Status / Rohs Status: Details

C8051F410/1/2/3
236
Bit7:
Bit6:
Bits5–4: T1M1–T1M0: Timer 1 Mode Select.
Bit3:
Bit2:
Bits1–0: T0M1–T0M0: Timer 0 Mode Select.
GATE1
R/W
Bit7
GATE1: Timer 1 Gate Control.
0: Timer 1 enabled when TR1 = 1 irrespective of /INT1 logic level.
1: Timer 1 enabled only when TR1 = 1 AND /INT1 is active as defined by bit IN1PL in regis-
ter IT01CF (see SFR Definition 12.7. “IT01CF: INT0/INT1 Configuration” on page 118).
C/T1: Counter/Timer 1 Select.
0: Timer Function: Timer 1 incremented by clock defined by T1M bit (CKCON.4).
1: Counter Function: Timer 1 incremented by high-to-low transitions on external input pin
(T1).
These bits select the Timer 1 operation mode.
GATE0: Timer 0 Gate Control.
0: Timer 0 enabled when TR0 = 1 irrespective of /INT0 logic level.
1: Timer 0 enabled only when TR0 = 1 AND /INT0 is active as defined by bit IN0PL in regis-
ter IT01CF (see SFR Definition 12.7. “IT01CF: INT0/INT1 Configuration” on page 118).
C/T0: Counter/Timer Select.
0: Timer Function: Timer 0 incremented by clock defined by T0M bit (CKCON.3).
1: Counter Function: Timer 0 incremented by high-to-low transitions on external input pin
(T0).
These bits select the Timer 0 operation mode.
T1M1
T0M1
C/T1
0
0
1
1
0
0
1
1
R/W
Bit6
T1M0
T0M0
0
1
0
1
0
1
0
1
SFR Definition 24.2. TMOD: Timer Mode
T1M1
R/W
Bit5
Mode 2: 8-bit counter/timer with auto-reload
Mode 2: 8-bit counter/timer with auto-reload
T1M0
R/W
Mode 3: Two 8-bit counter/timers
Bit4
Mode 0: 13-bit counter/timer
Mode 1: 16-bit counter/timer
Mode 0: 13-bit counter/timer
Mode 1: 16-bit counter/timer
Mode 3: Timer 1 inactive
Rev. 1.1
GATE0
R/W
Bit3
Mode
Mode
C/T0
R/W
Bit2
T0M1
R/W
Bit1
SFR Address:
T0M0
R/W
Bit0
0x89
00000000
Reset Value