C8051F411-GMR Silicon Laboratories Inc, C8051F411-GMR Datasheet - Page 116

Microcontrollers (MCU) 50 MIPS 32KB 12ADC RTCLOCK 28 PIN MCU

C8051F411-GMR

Manufacturer Part Number
C8051F411-GMR
Description
Microcontrollers (MCU) 50 MIPS 32KB 12ADC RTCLOCK 28 PIN MCU
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of C8051F411-GMR

Processor Series
C8051F4x
Core
8051
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
32 KB
Data Ram Size
2.25 KB
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
20
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
QFN
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F410DK
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 20 Channel
On-chip Dac
12 bit, 2 Channel
Package
28QFN EP
Device Core
8051
Family Name
C8051F41x
Maximum Speed
50 MHz
Ram Size
2.25 KB
Operating Supply Voltage
1.8|2.5|3.3|5 V
Operating Temperature
-40 to 85 °C
Lead Free Status / Rohs Status
 Details

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C8051F410/1/2/3
116
Bits 7–2: UNUSED. Read = 000000b. Write = don’t care.
Bit 1:
Bit 0:
Bits 7–2: UNUSED. Read = 000000b. Write = don’t care.
Bit 1:
Bit 0:
R/W
R/W
Bit7
Bit7
-
-
EMAT: Enable Port Match Interrupt.
This bit sets the masking of the Port Match interrupt.
0: Disable the Port Match interrupt.
1: Enable the Port Match interrupt.
EREG0: Enable Voltage Regulator Interrupt.
This bit sets the masking of the Voltage Regulator Dropout interrupt.
0: Disable the Voltage Regulator Dropout interrupt.
1: Enable the Voltage Regulator Dropout interrupt.
EMAT: Port Match Interrupt Priority Control.
This bit sets the priority of the Port Match interrupt.
0: Port Match interrupt set to low priority level.
1: Port Match interrupt set to high priority level.
PREG0: Voltage Regulator Interrupt Priority Control.
This bit sets the priority of the Voltage Regulator interrupt.
0: Voltage Regulator interrupt set to low priority level.
1: Voltage Regulator interrupt set to high priority level.
R/W
R/W
Bit6
Bit6
SFR Definition 12.6. EIP2: Extended Interrupt Priority 2
SFR Definition 12.5. EIE2: Extended Interrupt Enable 2
-
-
R/W
R/W
Bit5
Bit5
-
-
R/W
R/W
Bit4
Bit4
-
-
Rev. 1.1
R/W
R/W
Bit3
Bit3
-
-
R/W
R/W
Bit2
Bit2
-
-
EMAT
PMAT
R/W
R/W
Bit1
Bit1
SFR Address:
SFR Address:
EREG0
PREG0
R/W
R/W
Bit0
Bit0
0xE7
0xF7
00000000
00000000
Reset Value
Reset Value

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