AD9995KCP Analog Devices Inc, AD9995KCP Datasheet - Page 50

• Manufacturer Part Number: AD9995KCP
• Description: IC CCD SIGNAL PROCESSOR 56-LFCSP
• Manufacturer: Analog Devices Inc
• Type: CCD Signal Processor, 12-Bitr

Specifications of AD9995KCP

• Rohs Status: RoHS non-compliant
• Input Type: Logic
• Output Type: Logic
• Interface: 3-Wire Serial
• Current - Supply: 30mA
• Mounting Type: Surface Mount
• Package / Case: 56-LFCSP
• Analog Front End Type: CCD
• Analog Front End Category: Video
• Interface Type: Serial (3-Wire)
• Input Voltage Range: 0.5V
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (typ): 3V
• Operating Supply Voltage (max): 3.6V
• Resolution: 12b
• Number Of Adc's: 1
• Power Supply Type: Analog/Digital
• Operating Temp Range: -20C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 56
• Package Type: LFCSP EP
• Number Of Channels: 1
• Lead Free Status / RoHS Status: Not Compliant

Address Content Value
88
89
8A
8B
8C
8D
8E
8F
Address Content Value
90
91
92
93
94
95
96
97
AD9995
Data Bit Default
[1:0]
[2]
[3]
[7:4]
[9:8]
[11:10]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
Data Bit Default
[1:0]
[2]
[3]
[7:4]
[9:8]
[11:10]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Register Name
HBLKMASK_1
CLPOBPOL_1
CLPOBPOL_1
CLPOBPOL
PBLKPOL_1
PBLKPOL_1
PBLKPOL
VPATSEL_1
VPATSEL_1
VPATSEL
VMASK_1
VMASK_1
VMASK
HBLKALT_1
UNUSED
VPATREPO_1
VPATREPE_1
VPATSTART_1
HDLEN_1
PBLKTOG1_1
PBLKTOG2_1
HBLKTOG1_1
HBLKTOG2_1
HBLKTOG3_1
HBLKTOG4_1
HBLKTOG5_1
HBLKTOG6_1
CLPOBTOG1_1
CLPOBTOG2_1
Register Name
HBLKMASK_2
CLPOBPOL_2
CLPOBPOL_2
CLPOBPOL
PBLKPOL_2
PBLKPOL_2
PBLKPOL
VPATSEL_2
VPATSEL_2
VPATSEL
VMASK_2
VMASK_2
VMASK
HBLKALT_2
UNUSED
VPATREPO_2
VPATREPE_2
VPATSTART_2
HDLEN_2
PBLKTOG1_2
PBLKTOG2_2
HBLKTOG1_2
HBLKTOG2_2
HBLKTOG3_2
HBLKTOG4_2
HBLKTOG5_2
HBLKTOG6_2
CLPOBTOG1_2
CLPOBTOG2_2
Table XXXVIII. V-Sequence 1 (VSEQ1) Register Map
Table XXXIX. V-Sequence 2 (VSEQ2) Register Map
Description
Masking Polarity during HBLK. H1 [0]. H3 [1].
CLPOB Start Polarity
PBLK Start Polarity
Selected V-Pattern Group for V-Sequence 1
Enable Masking of V-Outputs (Specified by FREEZE/RESUME Registers)
Enable HBLK Alternation
Unused
Number of Selected V-Pattern Group Repetitions for Odd Lines
Number of Selected V-Pattern Group Repetitions for Even Lines
Start Position in the Line for the Selected V-Pattern Group
HD Line Length (Number of Pixels) for V-Sequence 1
PBLK Toggle Position 1 for V-Sequence 1
PBLK Toggle Position 2 for V-Sequence 1
HBLK Toggle Position 1 for V-Sequence 1
HBLK Toggle Position 2 for V-Sequence 1
HBLK Toggle Position 3 for V-Sequence 1
HBLK Toggle Position 4 for V-Sequence 1
HBLK Toggle Position 5 for V-Sequence 1
HBLK Toggle Position 6 for V-Sequence 1
CLPOB Toggle Position 1 for V-Sequence 1
CLPOB Toggle Position 2 for V-Sequence 1
Description
Masking Polarity during HBLK. H1 [0]. H3 [1].
CLPOB Start Polarity
PBLK Start Polarity
Selected V-Pattern Group for V-Sequence 2
Enable Masking of V-Outputs (Specified by FREEZE/RESUME Registers)
Enable HBLK Alternation
Unused
Number of Selected V-Pattern Group Repetitions for Odd Lines
Number of Selected V-Pattern Group Repetitions for Even Lines
Start Position in the Line for the Selected V-Pattern Group
HD Line Length (Number of Pixels) for V-Sequence 2
PBLK Toggle Position 1 for V-Sequence 2
PBLK Toggle Position 2 for V-Sequence 2
HBLK Toggle Position 1 for V-Sequence 2
HBLK Toggle Position 2 for V-Sequence 2
HBLK Toggle Position 3 for V-Sequence 2
HBLK Toggle Position 4 for V-Sequence 2
HBLK Toggle Position 5 for V-Sequence 2
HBLK Toggle Position 6 for V-Sequence 2
CLPOB Toggle Position 1 for V-Sequence 2
CLPOB Toggle Position 2 for V-Sequence 2
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