AD9995KCP Analog Devices Inc, AD9995KCP Datasheet - Page 6

IC CCD SIGNAL PROCESSOR 56-LFCSP

AD9995KCP

Manufacturer Part Number
AD9995KCP
Description
IC CCD SIGNAL PROCESSOR 56-LFCSP
Manufacturer
Analog Devices Inc
Type
CCD Signal Processor, 12-Bitr
Datasheet

Specifications of AD9995KCP

Rohs Status
RoHS non-compliant
Input Type
Logic
Output Type
Logic
Interface
3-Wire Serial
Current - Supply
30mA
Mounting Type
Surface Mount
Package / Case
56-LFCSP
Analog Front End Type
CCD
Analog Front End Category
Video
Interface Type
Serial (3-Wire)
Input Voltage Range
0.5V
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (typ)
3V
Operating Supply Voltage (max)
3.6V
Resolution
12b
Number Of Adc's
1
Power Supply Type
Analog/Digital
Operating Temp Range
-20C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
56
Package Type
LFCSP EP
Number Of Channels
1
Lead Free Status / RoHS Status
Not Compliant

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Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
AD9995
Mnemonic
D5
D6
D7
D8
D9
D10
D11
DRVDD
DRVSS
VSUB
SUBCK
V1
V2
V3
V4
V5
V6
VSG1
VSG2
VSG3
VSG4
VSG5
H1
H2
HVSS
HVDD
H3
H4
RGVSS
RG
RGVDD
TCVSS
TCVDD
CLO
CLI
Type
DO
DO
DO
DO
DO
DO
DO
P
P
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
P
P
DO
DO
P
DO
P
P
P
DO
DI
2
Description
Data Output
Data Output
Data Output
Data Output
Data Output
Data Output
Data Output (MSB)
Data Output Driver Supply
Data Output Driver Ground
CCD Substrate Bias
CCD Substrate Clock (E-Shutter)
CCD Vertical Transfer Clock 1
CCD Vertical Transfer Clock 2
CCD Vertical Transfer Clock 3
CCD Vertical Transfer Clock 4
CCD Vertical Transfer Clock 5
CCD Vertical Transfer Clock 6
CCD Sensor Gate Pulse 1
CCD Sensor Gate Pulse 2
CCD Sensor Gate Pulse 3
CCD Sensor Gate Pulse 4
CCD Sensor Gate Pulse 5
CCD Horizontal Clock 1
CCD Horizontal Clock 2
H1–H4 Driver Ground
H1–H4 Driver Supply
CCD Horizontal Clock 3
CCD Horizontal Clock 4
RG Driver Ground
CCD Reset Gate Clock
RG Driver Supply
Analog Ground for Timing Core
Analog Supply for Timing Core
Clock Output for Crystal
Reference Clock Input
(MSB) D11
DRVDD
SUBCK 11
DRVSS
VSUB 10
D10
D5
D6
D7
D8
D9
V1 12
V2 13
V3 14
1
2
3
4
5
6
7
8
9
PIN FUNCTION DESCRIPTIONS
PIN 1
IDENTIFIER
PIN CONFIGURATION
AD9995
TOP VIEW
–6–
Pin
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
NOTES
1
2
DO = Digital Output, DIO = Digital Input/Output, P = Power.
See Figure 38 for circuit configuration.
AI = Analog Input, AO = Analog Output, DI = Digital Input,
Mnemonic
AVDD
CCDIN
AVSS
REFT
REFB
SL
SDI
SCK
MSHUT
STROBE
SYNC
VD
DVSS
DVDD
HD
DCLK
D0
D1
D2
D3
D4
1
42
41
40
39
38
37
36
35
34
33
32
31
30
29
SDI
SL
REFB
REFT
AVSS
CCDIN
AVDD
CLI
CLO
TCVDD
TCVSS
RGVDD
RG
RGVSS
Type
P
AI
P
AO
AO
DI
DI
DI
DO
DO
DI
DIO
P
P
DIO
DO
DO
DO
DO
DO
DO
2
Description
Analog Supply for AFE
CCD Signal Input
Analog Ground for AFE
Voltage Reference Top Bypass
Voltage Reference Bottom Bypass
3-Wire Serial Load Pulse
3-Wire Serial Data Input
3-Wire Serial Clock
Mechanical Shutter Pulse
Strobe Pulse
External System Sync Input
Vertical Sync Pulse
(Input for Slave Mode,
Output for Master Mode)
Digital Ground
Power Supply for VSG, V1–V6,
HD/VD, MSHUT, STROBE,
SYNC, and Serial Interface
Horizontal Sync Pulse
(Input for Slave Mode, Output for
Master Mode)
Data Clock Output
Data Output (LSB)
Data Output
Data Output
Data Output
Data Output
REV. 0

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