PI7C7300ANAE Pericom Semiconductor, PI7C7300ANAE Datasheet - Page 32

no-image

PI7C7300ANAE

Manufacturer Part Number
PI7C7300ANAE
Description
IC PCI-PCI BRIDGE 3PORT 272-BGA
Manufacturer
Pericom Semiconductor
Datasheet

Specifications of PI7C7300ANAE

Applications
*
Interface
*
Voltage - Supply
*
Package / Case
272-PBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PI7C7300ANAE
Manufacturer:
Pericom
Quantity:
10 000
4.8.3
Table 4-6 DEVICE NUMBER TO IDSEL S1_AD OR S2_AD PIN MAPPING
!
!
!
PI7C7300A asserts a unique address line based on the device number. These address
lines may be used as secondary bus IDSEL signals. The mapping of the address lines
depends on the device number in the Type 1 address bits P_AD[15:11]. Table 4-6
presents the mapping that PI7C7300A uses.
PI7C7300A can assert up to 16 unique address lines to be used as IDSEL signals for up
to 16 devices on the secondary bus, for device numbers ranging from 0 through 15.
Because of electrical loading constraints of the PCI bus, more than 16 IDSEL signals
should not be necessary. However, if device numbers greater than 15 are desired, some
external method of generating IDSEL lines must be used, and no upper address bits are
then asserted. The configuration transaction is still translated and passed from the
primary bus to the secondary bus. If no IDSEL pin is asserted to a secondary device, the
transaction ends in a master abort.
PI7C7300A forwards Type 1 to Type 0 configuration read or write transactions as
delayed transactions. Type 1 to Type 0 configuration read or write transactions are
limited to a single 32-bit data transfer.
TYPE 1 TO TYPE 1 FORWARDING
Type 1 to Type 1 transaction forwarding provides a hierarchical configuration
mechanism when two or more levels of PCI-to-PCI bridges are used.
Device Number
0h
1h
2h
3h
4h
5h
6h
7h
8h
9h
Ah
Bh
Ch
Dh
Eh
Fh
10h – 1Eh
1Fh
Decodes the device number and drives the bit pattern specified in Table 4-6 on
S1_AD[31:16] or S2_AD[31:16] for the purpose of asserting the device’s IDSEL
signal.
Sets S1_AD[15:11] or S2_AD[15:11] to 0.
Leaves unchanged the function number and register number fields.
P_AD[15:11]
00000
00001
00010
00011
00100
00101
00110
00111
01000
01001
01010
01011
01100
01101
01110
01111
10000 – 11110
11111
Page 32 OF 109
Generate special cycle (P_AD[7:2] = 00h)
Secondary
S2_AD[31:16]
0000 0000 0000 0001
0000 0000 0000 0010
0000 0000 0000 0100
0000 0000 0000 1000
0000 0000 0001 0000
0000 0000 0010 0000
0000 0000 0100 0000
0000 0000 1000 0000
0000 0001 0000 0000
0000 0010 0000 0000
0000 0100 0000 0000
0000 1000 0000 0000
0001 0000 0000 0000
0010 0000 0000 0000
0100 0000 0000 0000
1000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000 (P_AD[7:2] = 00h)
IDSEL
3-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
S1_AD[31:16]
09/25/03 Revision 1.09
or
PI7C7300A
S1_AD
S2_AD
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
-
-
or

Related parts for PI7C7300ANAE