PI7C7300ANAE Pericom Semiconductor, PI7C7300ANAE Datasheet - Page 9

• Manufacturer Part Number: PI7C7300ANAE
• Description: IC PCI-PCI BRIDGE 3PORT 272-BGA
• Manufacturer: Pericom Semiconductor

Specifications of PI7C7300ANAE

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 272-PBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
LIST OF FIGURES
F
F
F
F
IGURE
IGURE
IGURE
IGURE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
4-5 READ TRANSACTION PREFETCHING ................................................................................ 28
4-6 DEVICE NUMBER TO IDSEL S1_AD OR S2_AD PIN MAPPING ....................................... 32
4-7 DELAYED WRITE TARGET TERMINATION RESPONSE.................................................. 37
4-8 RESPONSE TO POSTED WRITE TARGET TERMINATION ............................................... 37
4-9 RESPONSE TO DELAYED READ TARGET TERMINATION ............................................. 38
6-1 SUMMARY OF TRANSACTION ORDERING....................................................................... 48
7-1 SETTING THE PRIMARY INTERFACE DETECTED PARITY ERROR BIT ....................... 56
7-2 SETTING SECONDARY INTERFACE DETECTED PARITY ERROR BIT ......................... 57
7-3 SETTING PRIMARY INTERFACE DATA PARITY ERROR DETECTED BIT.................... 57
7-4 SETTING SECONDARY INTERFACE DATA PARITY ERROR DETECTED BIT ............. 58
7-5 ASSERTION OF P_PERR#....................................................................................................... 58
7-6 ASSERTION OF S_PERR#....................................................................................................... 59
7-7 ASSERTION OF P_SERR# FOR DATA PARITY ERRORS ................................................... 59
16-1 TAP PINS ................................................................................................................................ 96
16-2 JTAG BOUNDARY REGISTER ORDER .............................................................................. 98
9-1 SECONDARY ARBITER EXAMPLE..................................................................................... 65
16-1 TEST ACCESS PORT BLOCK DIAGRAM.......................................................................... 95
17-1 PCI SIGNAL TIMING MEASUREMENT CONDITIONS ................................................. 102
18-1 272-PIN PBGA PACKAGE ................................................................................................. 104
Page 9 OF 109
3-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
09/25/03 Revision 1.09
PI7C7300A