PI7C7300ANAE Pericom Semiconductor, PI7C7300ANAE Datasheet - Page 96

• Manufacturer Part Number: PI7C7300ANAE
• Description: IC PCI-PCI BRIDGE 3PORT 272-BGA
• Manufacturer: Pericom Semiconductor

Specifications of PI7C7300ANAE

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 272-PBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

16.2
Table 16-1 TAP PINS
with the TAP finite state machine outputs are decoded to select and control the test data
register selected by that instruction. Upon latching, all actions caused by any previous
instructions terminate.
The instruction determines the test to be performed, the test data register to be accessed,
or both. The IR is two bits wide. When the IR is selected, the most significant bit is
connected to TDI, and the least significant bit is connected to TDO. The value presented
on the TDI pin is shifted into the IR on each rising edge of TCK. The TAP controller
captures fixed parallel data (1101 binary). When a new instruction is shifted in through
TDI, the value 1101(binary) is always shifted out through TDO, least significant bit first.
This helps identify instructions in a long chain of serial data from several devices.
Upon activation of the TRST# reset pin, the latched instruction asynchronously changes
to the id code instruction. When the TAP controller moves into the test state other than
by reset activation, the opcode changes as TDI shifts, and becomes active on the falling
edge of TCK.
BOUNDARY-SCAN INSTRUCTION SET
The PI7C7300A supports three mandatory boundary-scan instructions (bypass,
sample/preload and extest). The table shown below lists the PI7C7300A’s boundary-scan
instruction codes. The “reserved” code should not be used.
Instruction Code
(binary)
0000
0001
Instruction
Requisite
Extest
IEEE 1149.1
Required
Sample/preload
IEEE 1149.1
Required
Idcode
IEEE 1149.1
Required
Bypass
IEEE 1149.1
Required
/
Opcode (binary)
0000
0001
0101
1111
Instruction Name
EXTEST
SAMPLE/PRELOAD
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1. A snapshot of the sample instruction is captured on the rising
Extest initiates testing of external circuitry, typically board-level
Bypass instruction selects the one-bit bypass register between
Description
interconnects and off chip circuitry. Extest connects the
boundary-scan register between TDI and TDO. When Extest is
selected, all output signal pin values are driven by values shifted
into the boundary-scan register and may change only of the
falling edge of TCK. Also, when extest is selected, all system
input pin states must be loaded into the boundary-scan register on
the rising-edge of TCK.
Sample/preload performs two functions:
2. On the falling edge of TCK, the data held in the boundary-scan
Reserved
TDI and TDO pins. 0 (binary) is the only instruction that
accesses the bypass register. While this instruction is in effect,
all other test data registers have no effect on system operation.
Test data registers with both test and system functionality
perform their system functions when this instruction is selected.
edge of TCK without interfering with normal operation. The
instruction causes boundary-scan register cells associated with
outputs to sample the value being driven.
cells is transferred to the slave register cells. Typically, the
slave latched data is applied to the system outputs via the
extest instruction.
Instruction Code
(binary)
0101
1111
3-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
09/25/03 Revision 1.09
Instruction Name
Reserved
Bypass
PI7C7300A