RCLXT16706FE Intel, RCLXT16706FE Datasheet - Page 220

• Manufacturer Part Number: RCLXT16706FE
• Manufacturer: Intel

Specifications of RCLXT16706FE

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Not Compliant

Intel IXF6048 — 51/155/622/2488 Mbit/s SONET/SDH Cell/Packet Interface
220
(1cc)21H
(1cc)23H-(1cc)22H
(1cc)25H-(1cc)24H
(1cc)27H-(1cc)26H
(1cc)28H
(1cc)29H
(1cc)2AH
(1cc)2BH
(1cc)2CH
(1cc)10H
(1cc)11H
(1cc)13H-(1cc)12H
(1cc)15H-(1cc)14H
(1cc)16H
(1cc)17H
(1cc)60H
(1cc)61H
(1cc)62H
(1cc)64H-(1cc)63H
(1cc)66H-(1cc)65H
(1cc)68H-(1cc)67H
(1cc)6AH-(1cc)69H
(1cc)6BH
(1cc)6DH-(1cc)6CH
(1cc)6EH
(1cc)6FH
(1cc)70H
(1cc)40H
(1cc)41H
(1cc)43H-(1cc)42H
(1cc)45H-(1cc)44H
(1cc)47H-(1cc)46H
Table 26. Register Address Map (Sheet 5 of 6)
Address
R_IUCFLTR
R_LCDFLTR
R_ACELLCNT
R_ICELLCNT
R_CHECNT
R_UHECNT
R_CFOCNT
R_ATMINT
R_ATMINTEN
T_ACPCNF
T_ICELLP
T_ACELLCNT
T_ICELLCNT
T_ATMINT
T_ATMINTEN
R_PHCCNF
R_MINPL
R_MAXPL
R_FRMCNT
R_BYTECNT
R_AFCNT
R_FCSECNT
R_PFOCNT
R_MINPLECNT
R_MAXPLECNT
R_POSINT
R_POSINTEN
T_PHCCNF
T_IPGCTRL
T_FRMCNT
T_BYTECNT
T_AFCNT
Mnemonic
ATM Transmit Channel Registers
POS Transmit Channel Registers
POS Receive Channel Registers
Receive Idle/Unassigned Cell Filter
Receive LCD Filter
Receive ATM Cell Counter
Receive Idle Cell Counter
Receive Correctable HEC Error Counter
Receive Uncorrectable HEC Error Counter
Receive Cell FIFO Overflow Counter
Receive ATM Interrupt (and Status) Register
Receive ATM Interrupt Enable
Transmit ATM Cell Processor Configuration
Transmit Idle Cell Pattern
Transmit ATM Cell Counter
Transmit ATM Interrupt Register
Transmit ATM Interrupt Enable
Receive POS HDLC Controller Configuration
Receive Minimum Packet Length
Receive Maximum Packet Length
Receive Frame Counter
Receive Byte Counter
Receive Aborted Frame Counter
Receive FCS Error Counter
Receive Packet FIFO Overflow Counter
Receive Minimum Packet Length Error Counter
Receive Maximum Packet Length Error Counter
Receive POS Interrupt Register
Receive POS Interrupt Enable
Transmit POS HDLC Controller Configuration
Transmit Interpacket Gap Control (Tx Flow Control)
Transmit Frame Counter
Transmit Byte Counter
Transmit Aborted Frame Counter
Transmit Idle Cell Counter
Register Name
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
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