RCLXT16706FE Intel, RCLXT16706FE Datasheet - Page 288
RCLXT16706FE
Manufacturer Part Number
RCLXT16706FE
Description
Manufacturer
Intel
Datasheet
1.RCLXT16706FE.pdf
(352 pages)
Specifications of RCLXT16706FE
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
2.97V
Operating Supply Voltage (max)
3.63V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Not Compliant
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Intel IXF6048 — 51/155/622/2488 Mbit/s SONET/SDH Cell/Packet Interface
11.7.12
288
Bit
15:8
3
2
1
0
Bit
7
6
5
4
3
2
1
0
J1Crc7ErrEn
HptUnEqpEn
HptSlmEn
VcAisEn
Unused
C2UnStableSt
J1allzeroSt
J1UnStableSt
J1MsMtchSt
J1Crc7ErrSt
HptUnEqpSt:
HptSlmSt
VcAisSt
S_HPT—Receive Path (HPT) Status ((1cc)DBH)
Name
Name
Present status of receive unstable/stable path signal label detect:
'0' = Receive stable/accepted signal label detected.
'1' = Receive unstable signal label.
Present status of the detection of an all '0's receive stable path trace
(accepted trace = all '0's):
'0' = Receive trace is either not stable or not all '0's (if stable).
'1' = Receive stable trace is all '0's.
Present status of receive unstable/stable path trace detect (accepted
trace when stable):
'0' = Receive stable/accepted trace detected.
'1' = Receive unstable trace.
Present status of comparison between received and expected J1
string:
'0' = Comparison matches.
'1' = Comparison does not match.
Present status of comparison between received and calculated J1
string CRC-7 value (16-byte string format only):
'0' = No detection of a CRC-7 error.
'1' = Detected a CRC-7 error in the receive trace.
Present status of unequipped status detects:
'0' = Equipped.
'1' = Unequipped ≡ RcvC2 = '00000000'
Present status of Signal Label Mismatch detection:
'0' = No mismatch
'1' = Mismatch ≡ (RcvC2 ≠ ExpC2) AND (RcvC2 ≠ 00H) AND (RcvC2
≠ 01H)
Present status of VC AIS detect:
'0' = No AIS
'1' = AIS ≡ RcvC2 (signal label) = '11111111'
Active-high enable for the J1Crc7Err interrupt bit.
Active-high enable for the HptUnEqp interrupt bit.
Active-high enable for the HptSlm interrupt bit.
Active-high enable for the VcAis interrupt bit.
Description
Description
Type
Type
R/W
R/W
R/W
R/W
R
R
R
R
R
R
R
R
Datasheet
Default
Default
'X'
'X'
'X'
'X'
'X'
'X'
'X'
'X'
'0'
'0'
'0'
'0'
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