RCLXT16706FE Intel, RCLXT16706FE Datasheet - Page 261

• Manufacturer Part Number: RCLXT16706FE
• Manufacturer: Intel

Specifications of RCLXT16706FE

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Not Compliant

11.4.2
11.4.3
11.4.4
11.4.5
Datasheet
14:10
15:13
12:0
15:0
Bit
9:5
4:0
Bit
Bit
15
RcvOofCnfg
L[4:0]
M[4:0]
N[4:0]
Unused
OofCnt[12:0]
B1Cnt[15:0]
Name
LOF_LMN—Out Of Frame and Loss of Frame L, M, and N
Configuration ((1cc)81H)
This register sets the Loss Of Frame detection parameters.
OOF_ECNT—Out Of Frame Event Counter ((1cc)82H)
This counter increments each time an OOF error event is detected. A write to the counter
address((1cc)82H) causes the entire counter to be loaded into a buffer and then cleared. The
contents of the buffer can then be read.
B1_ERRCNT—B1 Error Counter ((1cc)83H)
This counter increments each time a B1 error event is detected. A write to the counter address
((1cc)83H) causes the entire counter to be loaded into a buffer and then cleared. The contents of the
buffer can then be read.
R_J0_ESTRA—J0 Receive Expected String Data Access ((1cc)85H)
The following registers (R_J0_ESTRA and R_J0_ASTRA) allow control and access of the
expected and accepted Trace Identifier J0 string received in the incoming SOH. This is outlined
below.
Name
Name
This bit configures the number of consecutive erroneous framewords to
detect before going to an Out Of Frame condition, after the frame has been
synchronized. Also, see configuration bit RcvFwdOofCnfg, register R-
RSTC:
'0' = Requires four consecutive frames within 500 µs, having incorrect
framewords to declare an OOF condition.
'1' = Requires five consecutive frames within 500 µs, having incorrect
framewords to declare an OOF condition. (SDH)
After an OOF event is observed (indicated by OofSt = S_RG[0] = '1'), this
represents the L parameter. L + 1 is the number of frames with OofSt = '1'
needed to enter the LOF state (indicated by LofSt = (1cc)D8H[1] = '1').
After an OOF event is observed (indicated by OofSt = S_RG[0] = '1'), this
represents the M parameter. M + 1 is the number of frames with OofSt = '0'
needed to reenter the NORM state before entering the LOF state.
After an LOF event is observed (indicated by LofSt = S_RG[1] = '1'), this
represents the N parameter. N + 1 is the number of frames with OofSt = '0'
needed to reenter the NORM state from the LOF state (indicated by LofSt =
S_RG[1] = '0').
51/155/622/2488 Mbit/s SONET/SDH Cell/Packet Interface — Intel IXF6048
This field indicates the B1 error count value.
This field indicates the OOF error count value.
Description
Description
Description
Type
Type
Type
R
R
R/W
R/W
R/W
R/W
R
Default
Default
Default
00000
00000
00000
00H
00H
'0'
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