RCLXT16706FE Intel, RCLXT16706FE Datasheet - Page 222

• Manufacturer Part Number: RCLXT16706FE
• Manufacturer: Intel

Specifications of RCLXT16706FE

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Not Compliant

Intel IXF6048 — 51/155/622/2488 Mbit/s SONET/SDH Cell/Packet Interface
11.2.3
222
15:9
Bit
7:4
3:0
8
Unused
Reset
ResetXmtCh[3:0]
ResetRcvCh[3:0]
SRESET—Software Reset Register ((000)03H)
The SRESET register allows the software to asynchronously reset the entire Intel IXF6048 device
or only a part of it. When a bit is set to logic one, the section of the device controlled by this bit is
held in reset. None of these bits are self-clearing; a logic zero must be written to bring Intel
IXF6048 out of reset.
Name
Resets the entire Intel IXF6048 device (equivalent to the RESET
input pin).
Transmit section reset:
When Intel IXF6048 is configured as a single processor (single
line side interface), ResetXmtCh[0] resets the entire transmit
section of Intel IXF6048 including:
ResetXmtCh[3:1] are unused bits. ResetXmtCh[0] does not reset
the Global or the UTOPIA configuration registers.
When Intel IXF6048 is configured as a quad processor (quad line
side interface), ResetXmtCh[i] (i = 0, 1, 2, 3) resets the transmit
section of channel #i including:
ResetXmtCh[i] (i = 0, 1, 2, 3) does not reset the Global or the
UTOPIA configuration registers.
Receive section reset:
When Intel IXF6048 is configured as a single processor (single
line side interface), ResetRcvCh[0] resets the entire receive
section of Intel IXF6048 including:
ResetRcvCh[3:1] are unused bits. ResetRcvCh[0] does not reset
the Global or the UTOPIA configuration registers.
When Intel IXF6048 is configured as a quad processor (quad line
side interface), ResetRcvCh[i] (i = 0, 1, 2, 3) resets the receive
section of channel #i including:
ResetRcvCh[i] (i = 0, 1, 2, 3) does not reset the Global or the
UTOPIA configuration registers.
• Transmit SDH processing
• Transmit ATM/POS processing
• UTOPIA interface
• Transmit SDH processor
• Transmit ATM/POS processors
• Transmit UTOPIA interface
• Receive SDH processing
• Receive ATM/POS processing
• UTOPIA interface
• Receive SDH processor
• Receive ATM/POS processors
• Receive UTOPIA interface
Description
Type
R/W
R/W
R/W
Datasheet
Default
0000
0000
'0'
0