RCLXT16706FE Intel, RCLXT16706FE Datasheet - Page 72

• Manufacturer Part Number: RCLXT16706FE
• Manufacturer: Intel

Specifications of RCLXT16706FE

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Not Compliant

Intel IXF6048 — 51/155/622/2488 Mbit/s SONET/SDH Cell/Packet Interface
72
Table 4.
Pin Description (Sheet 58 of 66)
TXFA_0
TXFA_1
TXFA_2
TXFA_3
NOTE: See notes 1, 2, and
Pin Name
Pin
D8
A5
A6
E8
LVTTL
Output
12 mA
Type
3
at the end of the table.
Transmit Direct Frame-Available Outputs. TXFA_i (i = 0, 1, 2, 3) is the
active-high output signal indicating the status of transmit FIFO #i.
TXFA_i (i = 0, 1, 2, 3) outputs are always driven.
ATM-UTOPIA Mode
TXFA_i (i = 0, 1, 2, 3) is used to perform cell-level handshake on transmit
FIFO #i and goes high when the transmit FIFO #i has free available
space to write one or more complete ATM cells.
When the ATM cell being written into the UTOPIA interface is using the
last cell-space available in FIFO #i, TXFA_i (i = 0, 1, 2, 3) is deasserted
on the same TXCLK_i rising edge that samples the word written in the
TXDATA_i bus that contains the payload byte (1, 2, … 48) indicated by
XmtCADeassert[5:0] (register T_UICHCNF). Only values 9 to 48 are
valid payload byte positions for XmtCADeassert[5:0]. Configuring
XmtCADeassert[5:0] to an appropriate value ensures that the ATM Layer
device can detect that the current ATM cell is going to fill up the transmit
FIFO four clock cycles (or more) before writing the last word.
POS-UTOPIA Mode
TXFA_i (i = 0, 1, 2, 3) indicates the availability of free space in FIFO #i.
TXFA_i is asserted when the available space (in 32-bit words) of FIFO #i
is equal to or greater than the “transmit nearly empty programmable
watermark” (XmtNEPWM, channel register T_NEPWM). TXFA_i is
deasserted when FIFO #i is full or the available space (in 32-bit words) is
less than the “transmit nearly full programmable watermark”
(XmtNFPWM, channel register T_NFPWM).
The TXFA_i (i = 0, 1, 2, 3) outputs are updated on the rising edge of
TXCLK_i.
Description
Datasheet