PEF 20550 H V2.1 Infineon Technologies, PEF 20550 H V2.1 Datasheet - Page 104

• Manufacturer Part Number: PEF 20550 H V2.1
• Description: IC INTERFACE CTRLR PCM MQFP80
• Manufacturer: Infineon Technologies
• Series: ELIC®r

Specifications of PEF 20550 H V2.1

• Function: Line Card Controller
• Interface: ISDN, PCM
• Number Of Circuits: 1
• Voltage - Supply: 5V
• Current - Supply: 15mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 80-SQFP
• Includes: Change Detection, Power-Up Reset Generation
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Other names: PEF20550HV2.1XT; PEF20550HV21XP; SP000007794; SP000007795

set into auto-mode when communicating with downstream subscribers. The EPIC-1’s
CFI should be configured to follow the line card IOM-2 protocol, i.e.:
– CFI mode 0
– 2-Mbit/s data rate (usually with a double rate clock)
– 256 bits per frame and port (8 subscribers per port)
– 16-kbit/s D-channels positioned as bits 7,6 of time slots (n
3.7.1
Sending data from the SACCO-A to downstream subscribers is handled by the transmit
channel master of the D-channel arbiter. The downstream Control Memory (CM) Code
for subscribers who may be sent data by the SACCO-A must be set to '1010'
even time slot and to '1011'
If data is to be sent to a single subscriber (no broadcasting), this subscriber must be
selected in the XDC-register. Whenever the subscribers D-channel is to be output at the
ELIC’s CFI, the transmit channel master provides a 2-bit transmit strobe to the
SACCO-A. Every frame, 2 data bits are thus strobed from the SACCO-A into the
subscriber’s D-channel, when the SACCO-A has been commanded to send data. As the
subscribers D-channel recurs every 125 s, the data is transmitted from the SACCO-A
to the subscriber at a rate of 16 kbit/s. If the SACCO-A has no data to send, it sends its
inter frame timefill ('1's) to the subscriber when strobed by the transmit channel master.
With the XDC.BCT bit set (broadcasting), the BCG-registers are used to select the
subscribers to whom the SACCO’s data is to be sent. The SACCO’s output is first copied
to an internal buffer. From this buffer, the data is strobed, 2 bits at a time, to all selected
subscribers. When the SACCO-A has no data to send, its inter frame timefill ('1's) is
copied to the buffer and strobed into the D-channels of the selected subscribers.
3.7
The D-channel arbiter links the SACCO-A to the CFI of the EPIC-1. EPIC-1 and
SACCO-A should therefore be initialized before setting up the D-channel arbiter, as
demonstrated in chapter 3.8.
In downstream direction, the D-channel arbiter distributes data from the SACCO-A to the
selected subscribers. In upstream direction, the D-channel arbiter ensures that the
SACCO-A receives data from only a single correspondent at a time. Given proper
initialization, the operation of the D-channel arbiter is largely transparent. The user of the
ELIC can thus concentrate on operating the SACCO-A as described in chapters 2.2.8
and 3.6.
For the D-channel arbiter to operate as desired, the SACCO-A must be set clock mode 3
and inter frame timefill set to all ’1’s. It is also recommended that the SACCO-A not be
should be programmed to "11 C/I-code 11". For example, a CM-data entry of '11000011'
would set the C/I-code to '0000'. Refer to figure 48.
Semiconductor Group
D-Channel Arbiter
SACCO-A Transmission
B
for the odd time slot. The CM-data of the even time slot
104
Operational Description
4)
1 for n = 1
PEB 20550
PEF 20550
B
for the
8
01.96